mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2025-08-05 13:26:55 +00:00
Convert assert(0) to llvm_unreachable
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149967 91177308-0d34-0410-b5e6-96231b3b80d8
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@@ -185,9 +185,7 @@ void RuntimeDyldELF::resolveX86_64Relocation(StringRef Name,
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}
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switch (RE.Type) {
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default:
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assert(0 && ("Relocation type not implemented yet!"));
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break;
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default: llvm_unreachable("Relocation type not implemented yet!");
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case ELF::R_X86_64_64: {
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uint8_t **Target = reinterpret_cast<uint8_t**>(TargetAddr);
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*Target = Addr + RE.Addend;
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@@ -249,8 +247,7 @@ void RuntimeDyldELF::resolveX86Relocation(StringRef Name,
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default:
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// There are other relocation types, but it appears these are the
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// only ones currently used by the LLVM ELF object writer
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assert(0 && ("Relocation type not implemented yet!"));
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break;
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llvm_unreachable("Relocation type not implemented yet!");
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}
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}
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@@ -272,9 +269,7 @@ void RuntimeDyldELF::resolveRelocation(StringRef Name,
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case Triple::arm:
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resolveArmRelocation(Name, Addr, RE);
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break;
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default:
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assert(0 && "Unsupported CPU type!");
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break;
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default: llvm_unreachable("Unsupported CPU type!");
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}
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}
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@@ -26,7 +26,7 @@ resolveRelocation(uint8_t *Address, uint64_t Value, bool isPCRel,
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unsigned Type, unsigned Size, int64_t Addend) {
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// This just dispatches to the proper target specific routine.
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switch (CPUType) {
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default: assert(0 && "Unsupported CPU type!");
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default: llvm_unreachable("Unsupported CPU type!");
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case mach::CTM_x86_64:
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return resolveX86_64Relocation((uintptr_t)Address, (uintptr_t)Value,
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isPCRel, Type, Size, Addend);
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