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Add support for /0 /1, etc type instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4802 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -52,24 +52,35 @@ namespace X86II {
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///
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MRMSrcMem = 6,
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/// TODO: Mod/RM that uses a fixed opcode extension, like /0
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/// MRMS[0-7][rm] - These forms are used to represent instructions that use
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/// a Mod/RM byte, and use the middle field to hold extended opcode
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/// information. In the intel manual these are represented as /0, /1, ...
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///
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FormMask = 7,
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// First, instructions that operate on a register r/m operand...
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MRMS0r = 16, MRMS1r = 17, MRMS2r = 18, MRMS3r = 19, // Format /0 /1 /2 /3
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MRMS4r = 20, MRMS5r = 21, MRMS6r = 22, MRMS7r = 23, // Format /4 /5 /6 /7
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// Next, instructions that operate on a memory r/m operand...
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MRMS0m = 24, MRMS1m = 25, MRMS2m = 26, MRMS3m = 27, // Format /0 /1 /2 /3
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MRMS4m = 28, MRMS5m = 29, MRMS6m = 30, MRMS7m = 31, // Format /4 /5 /6 /7
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FormMask = 31,
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//===------------------------------------------------------------------===//
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// Actual flags...
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/// Void - Set if this instruction produces no value
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Void = 1 << 3,
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Void = 1 << 5,
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// TB - TwoByte - Set if this instruction has a two byte opcode, which
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// starts with a 0x0F byte before the real opcode.
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TB = 1 << 4,
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TB = 1 << 6,
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// OpSize - Set if this instruction requires an operand size prefix (0x66),
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// which most often indicates that the instruction operates on 16 bit data
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// instead of 32 bit data.
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OpSize = 1 << 5,
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OpSize = 1 << 7,
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};
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}
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