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ARM VTBL (one register) assembly parsing and encoding.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142441 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jim Grosbach
2011-10-18 23:02:30 +00:00
parent 85f3a0a4c4
commit 862019c37f
5 changed files with 102 additions and 3 deletions
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utils/TableGen/EDEmitter.cpp
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@@ -571,6 +571,7 @@ static int ARMFlagFromOpName(LiteralConstantEmitter *type,
REG("QPR");
REG("QQPR");
REG("QQQQPR");
REG("VecListOneD");
IMM("i32imm");
IMM("i32imm_hilo16");