From 866bdadd83357e6d8811f5ff295adc00513591c7 Mon Sep 17 00:00:00 2001 From: Jakob Stoklund Olesen Date: Mon, 4 Apr 2011 17:57:26 +0000 Subject: [PATCH] Disable the PowerPC/Atomics-64 test. The code inserted by PPCTargetLowering::EmitInstrWithCustomInserter for ppc64 is wrong, and I don't know how to fix it. It seems to be using the correct register classes for pointers, but it inserts all 32-bit instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128835 91177308-0d34-0410-b5e6-96231b3b80d8 --- test/CodeGen/PowerPC/Atomics-64.ll | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-) diff --git a/test/CodeGen/PowerPC/Atomics-64.ll b/test/CodeGen/PowerPC/Atomics-64.ll index 1dc4310761c..cfc1eb98e06 100644 --- a/test/CodeGen/PowerPC/Atomics-64.ll +++ b/test/CodeGen/PowerPC/Atomics-64.ll @@ -1,5 +1,11 @@ -; RUN: llc < %s -march=ppc64 -; ModuleID = 'Atomics.c' +; RUN: llc < %s -march=ppc64 -verify-machineinstrs +; +; This test is disabled until PPCISelLowering learns to insert proper 64-bit +; code for ATOMIC_CMP_SWAP. Currently, it is inserting 32-bit instructions with +; 64-bit operands which causes the machine code verifier to throw a tantrum. +; +; XFAIL: * + target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f128:64:128" target triple = "powerpc64-apple-darwin9" @sc = common global i8 0 ; [#uses=52]