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It's (currently) not safe to keep certain physical registers live across basic blocks, e.g. x86 fp stack registers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64374 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -496,6 +496,12 @@ void AvailableSpills::AddAvailableRegsToLiveIn(MachineBasicBlock &MBB) {
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I = PhysRegsAvailable.begin(), E = PhysRegsAvailable.end();
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I != E; ++I) {
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unsigned Reg = (*I).first;
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const TargetRegisterClass* RC = TRI->getPhysicalRegisterRegClass(Reg);
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// FIXME: A temporary workaround. We can't reuse available value if it's
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// not safe to move the def of the virtual register's class. e.g.
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// X86::RFP* register classes. Do not add it as a live-in.
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if (!TII->isSafeToMoveRegClassDefs(RC))
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continue;
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if (!MBB.isLiveIn(Reg))
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MBB.addLiveIn(Reg);
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}
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@ -1361,7 +1367,12 @@ void LocalSpiller::RewriteMBB(MachineBasicBlock &MBB, VirtRegMap &VRM,
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bool DoReMat = VRM.isReMaterialized(VirtReg);
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int SSorRMId = DoReMat
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? VRM.getReMatId(VirtReg) : VRM.getStackSlot(VirtReg);
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unsigned InReg = Spills.getSpillSlotOrReMatPhysReg(SSorRMId);
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const TargetRegisterClass* RC = RegInfo->getRegClass(VirtReg);
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// FIXME: A temporary workaround. Don't reuse available value if it's
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// not safe to move the def of the virtual register's class. e.g.
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// X86::RFP* register classes.
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unsigned InReg = TII->isSafeToMoveRegClassDefs(RC) ?
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Spills.getSpillSlotOrReMatPhysReg(SSorRMId) : 0;
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if (InReg == Phys) {
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// If the value is already available in the expected register, save
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// a reload / remat.
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@ -1387,7 +1398,6 @@ void LocalSpiller::RewriteMBB(MachineBasicBlock &MBB, VirtRegMap &VRM,
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// If the reloaded / remat value is available in another register,
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// copy it to the desired register.
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const TargetRegisterClass* RC = RegInfo->getRegClass(VirtReg);
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TII->copyRegToReg(MBB, &MI, Phys, InReg, RC, RC);
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// This invalidates Phys.
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28
test/CodeGen/X86/2009-02-12-SpillerBug.ll
Normal file
28
test/CodeGen/X86/2009-02-12-SpillerBug.ll
Normal file
@ -0,0 +1,28 @@
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; RUN: llvm-as < %s | llc -march=x86 -mtriple=i386-apple-darwin8
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define hidden void @__mulxc3({ x86_fp80, x86_fp80 }* noalias nocapture sret %agg.result, x86_fp80 %a, x86_fp80 %b, x86_fp80 %c, x86_fp80 %d) nounwind {
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entry:
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%0 = mul x86_fp80 %b, %d ; <x86_fp80> [#uses=1]
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%1 = sub x86_fp80 0xK00000000000000000000, %0 ; <x86_fp80> [#uses=1]
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%2 = add x86_fp80 0xK00000000000000000000, 0xK00000000000000000000 ; <x86_fp80> [#uses=1]
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%3 = fcmp uno x86_fp80 %1, 0xK00000000000000000000 ; <i1> [#uses=1]
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%4 = fcmp uno x86_fp80 %2, 0xK00000000000000000000 ; <i1> [#uses=1]
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%or.cond = and i1 %3, %4 ; <i1> [#uses=1]
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br i1 %or.cond, label %bb47, label %bb71
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bb47: ; preds = %entry
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%5 = fcmp uno x86_fp80 %a, 0xK00000000000000000000 ; <i1> [#uses=1]
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br i1 %5, label %bb60, label %bb62
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bb60: ; preds = %bb47
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%6 = tail call x86_fp80 @copysignl(x86_fp80 0xK00000000000000000000, x86_fp80 %a) nounwind readnone ; <x86_fp80> [#uses=0]
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br label %bb62
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bb62: ; preds = %bb60, %bb47
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unreachable
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bb71: ; preds = %entry
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ret void
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}
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declare x86_fp80 @copysignl(x86_fp80, x86_fp80) nounwind readnone
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