6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2024-07-18 12:29:27 +00:00
Code Issues Projects Releases Wiki Activity

Add references to delay slot filler pass.

Browse Source 
Fill in addPassesToJITCompile method.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12729 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Brian Gaeke 2004-04-06 23:21:24 +00:00
parent 3a8ad62d4f
commit 86a8790826
4 changed files with 48 additions and 2 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
lib/Target/Sparc/Sparc.h
View File

@ -25,6 +25,7 @@ namespace llvm {
FunctionPass *createSparcV8SimpleInstructionSelector(TargetMachine &TM);
FunctionPass *createSparcV8CodePrinterPass(std::ostream &OS,
TargetMachine &TM);
FunctionPass *createSparcV8DelaySlotFillerPass(TargetMachine &TM);
} // end namespace llvm;

24
lib/Target/Sparc/SparcTargetMachine.cpp
View File

@ -54,6 +54,12 @@ bool SparcV8TargetMachine::addPassesToEmitAssembly(PassManager &PM,
if (PrintMachineCode)
PM.add(createMachineFunctionPrinterPass(&std::cerr));
PM.add(createSparcV8DelaySlotFillerPass(*this));
// Print machine instructions after filling delay slots.
if (PrintMachineCode)
PM.add(createMachineFunctionPrinterPass(&std::cerr));
// Output assembly language.
PM.add(createSparcV8CodePrinterPass(Out, *this));
@ -66,7 +72,23 @@ bool SparcV8TargetMachine::addPassesToEmitAssembly(PassManager &PM,
/// implement a fast dynamic compiler for this target.
///
void SparcV8JITInfo::addPassesToJITCompile(FunctionPassManager &PM) {
// <insert instruction selector passes here>
PM.add(createSparcV8SimpleInstructionSelector(TM));
// Print machine instructions as they were initially generated.
if (PrintMachineCode)
PM.add(createMachineFunctionPrinterPass(&std::cerr));
PM.add(createRegisterAllocator());
PM.add(createPrologEpilogCodeInserter());
// Print machine instructions after register allocation and prolog/epilog
// insertion.
if (PrintMachineCode)
PM.add(createMachineFunctionPrinterPass(&std::cerr));
PM.add(createSparcV8DelaySlotFillerPass(TM));
// Print machine instructions after filling delay slots.
if (PrintMachineCode)
PM.add(createMachineFunctionPrinterPass(&std::cerr));
}

1
lib/Target/SparcV8/SparcV8.h
View File

@ -25,6 +25,7 @@ namespace llvm {
FunctionPass *createSparcV8SimpleInstructionSelector(TargetMachine &TM);
FunctionPass *createSparcV8CodePrinterPass(std::ostream &OS,
TargetMachine &TM);
FunctionPass *createSparcV8DelaySlotFillerPass(TargetMachine &TM);
} // end namespace llvm;

24
lib/Target/SparcV8/SparcV8TargetMachine.cpp
View File

@ -54,6 +54,12 @@ bool SparcV8TargetMachine::addPassesToEmitAssembly(PassManager &PM,
if (PrintMachineCode)
PM.add(createMachineFunctionPrinterPass(&std::cerr));
PM.add(createSparcV8DelaySlotFillerPass(*this));
// Print machine instructions after filling delay slots.
if (PrintMachineCode)
PM.add(createMachineFunctionPrinterPass(&std::cerr));
// Output assembly language.
PM.add(createSparcV8CodePrinterPass(Out, *this));
@ -66,7 +72,23 @@ bool SparcV8TargetMachine::addPassesToEmitAssembly(PassManager &PM,
/// implement a fast dynamic compiler for this target.
///
void SparcV8JITInfo::addPassesToJITCompile(FunctionPassManager &PM) {
// <insert instruction selector passes here>
PM.add(createSparcV8SimpleInstructionSelector(TM));
// Print machine instructions as they were initially generated.
if (PrintMachineCode)
PM.add(createMachineFunctionPrinterPass(&std::cerr));
PM.add(createRegisterAllocator());
PM.add(createPrologEpilogCodeInserter());
// Print machine instructions after register allocation and prolog/epilog
// insertion.
if (PrintMachineCode)
PM.add(createMachineFunctionPrinterPass(&std::cerr));
PM.add(createSparcV8DelaySlotFillerPass(TM));
// Print machine instructions after filling delay slots.
if (PrintMachineCode)
PM.add(createMachineFunctionPrinterPass(&std::cerr));
}