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Don't crash SPU BE with memory accesses with big alignmnet.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123620 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Kalle Raiskila
2011-01-17 11:59:20 +00:00
parent 5de5d4b6d0
commit 8702e8be8d
2 changed files with 13 additions and 4 deletions
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8
lib/Target/CellSPU/SPUISelLowering.cpp
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@@ -560,7 +560,7 @@ LowerLOAD(SDValue Op, SelectionDAG &DAG, const SPUSubtarget *ST) {
assert( LN->getAddressingMode() == ISD::UNINDEXED
&& "we should get only UNINDEXED adresses");
// clean aligned loads can be selected as-is
if (InVT.getSizeInBits() == 128 && alignment == 16)
if (InVT.getSizeInBits() == 128 && (alignment%16) == 0)
return SDValue();
// Get pointerinfos to the memory chunk(s) that contain the data to load
@@ -573,7 +573,7 @@ LowerLOAD(SDValue Op, SelectionDAG &DAG, const SPUSubtarget *ST) {
SDValue basePtr = LN->getBasePtr();
SDValue rotate;
if (alignment == 16) {
if ((alignment%16) == 0) {
ConstantSDNode *CN;
// Special cases for a known aligned load to simplify the base pointer
@@ -777,7 +777,7 @@ LowerSTORE(SDValue Op, SelectionDAG &DAG, const SPUSubtarget *ST) {
assert( SN->getAddressingMode() == ISD::UNINDEXED
&& "we should get only UNINDEXED adresses");
// clean aligned loads can be selected as-is
if (StVT.getSizeInBits() == 128 && alignment == 16)
if (StVT.getSizeInBits() == 128 && (alignment%16) == 0)
return SDValue();
SDValue alignLoadVec;
@@ -785,7 +785,7 @@ LowerSTORE(SDValue Op, SelectionDAG &DAG, const SPUSubtarget *ST) {
SDValue the_chain = SN->getChain();
SDValue insertEltOffs;
if (alignment == 16) {
if ((alignment%16) == 0) {
ConstantSDNode *CN;
// Special cases for a known aligned load to simplify the base pointer
// and insertion byte: