mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-08-22 10:29:35 +00:00
Minor optimization:
Look for situations like this: %reg1024<def> = MOV r1 %reg1025<def> = MOV r0 %reg1026<def> = ADD %reg1024, %reg1025 r0 = MOV %reg1026 Commute the ADD to hopefully eliminate an otherwise unavoidable copy. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65752 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -63,28 +63,41 @@ namespace {
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MachineRegisterInfo *MRI;
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LiveVariables *LV;
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// DistanceMap - Keep track the distance of a MI from the start of the
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// current basic block.
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DenseMap<MachineInstr*, unsigned> DistanceMap;
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// SrcRegMap - A map from virtual registers to physical registers which
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// are likely targets to be coalesced to due to copies from physical
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// registers to virtual registers. e.g. v1024 = move r0.
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DenseMap<unsigned, unsigned> SrcRegMap;
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// DstRegMap - A map from virtual registers to physical registers which
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// are likely targets to be coalesced to due to copies to physical
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// registers from virtual registers. e.g. r1 = move v1024.
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DenseMap<unsigned, unsigned> DstRegMap;
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bool Sink3AddrInstruction(MachineBasicBlock *MBB, MachineInstr *MI,
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unsigned Reg,
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MachineBasicBlock::iterator OldPos);
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bool isProfitableToReMat(unsigned Reg, const TargetRegisterClass *RC,
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MachineInstr *MI, MachineInstr *DefMI,
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MachineBasicBlock *MBB, unsigned Loc,
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DenseMap<MachineInstr*, unsigned> &DistanceMap);
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MachineBasicBlock *MBB, unsigned Loc);
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bool NoUseAfterLastDef(unsigned Reg, MachineBasicBlock *MBB, unsigned Dist,
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DenseMap<MachineInstr*, unsigned> &DistanceMap,
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unsigned &LastDef);
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bool isProfitableToCommute(unsigned regB, unsigned regC,
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MachineInstr *MI, MachineBasicBlock *MBB,
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unsigned Dist,
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DenseMap<MachineInstr*, unsigned> &DistanceMap);
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unsigned Dist);
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bool CommuteInstruction(MachineBasicBlock::iterator &mi,
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MachineFunction::iterator &mbbi,
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unsigned RegC, unsigned Dist,
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DenseMap<MachineInstr*, unsigned> &DistanceMap);
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unsigned RegB, unsigned RegC, unsigned Dist);
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void ProcessCopy(MachineInstr *MI, MachineBasicBlock *MBB,
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SmallPtrSet<MachineInstr*, 8> &Processed);
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public:
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static char ID; // Pass identification, replacement for typeid
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TwoAddressInstructionPass() : MachineFunctionPass(&ID) {}
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@ -235,8 +248,7 @@ bool
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TwoAddressInstructionPass::isProfitableToReMat(unsigned Reg,
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const TargetRegisterClass *RC,
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MachineInstr *MI, MachineInstr *DefMI,
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MachineBasicBlock *MBB, unsigned Loc,
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DenseMap<MachineInstr*, unsigned> &DistanceMap){
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MachineBasicBlock *MBB, unsigned Loc) {
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bool OtherUse = false;
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for (MachineRegisterInfo::use_iterator UI = MRI->use_begin(Reg),
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UE = MRI->use_end(); UI != UE; ++UI) {
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@ -270,7 +282,6 @@ TwoAddressInstructionPass::isProfitableToReMat(unsigned Reg,
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/// def location by reference
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bool TwoAddressInstructionPass::NoUseAfterLastDef(unsigned Reg,
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MachineBasicBlock *MBB, unsigned Dist,
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DenseMap<MachineInstr*, unsigned> &DistanceMap,
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unsigned &LastDef) {
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LastDef = 0;
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unsigned LastUse = Dist;
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@ -292,12 +303,110 @@ bool TwoAddressInstructionPass::NoUseAfterLastDef(unsigned Reg,
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return !(LastUse > LastDef && LastUse < Dist);
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}
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/// isCopyToReg - Return true if the specified MI is a copy instruction or
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/// a extract_subreg instruction. It also returns the source and destination
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/// registers and whether they are physical registers by reference.
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static bool isCopyToReg(MachineInstr &MI, const TargetInstrInfo *TII,
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unsigned &SrcReg, unsigned &DstReg,
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bool &IsSrcPhys, bool &IsDstPhys) {
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SrcReg = 0;
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DstReg = 0;
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unsigned SrcSubIdx, DstSubIdx;
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if (!TII->isMoveInstr(MI, SrcReg, DstReg, SrcSubIdx, DstSubIdx)) {
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if (MI.getOpcode() == TargetInstrInfo::EXTRACT_SUBREG) {
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DstReg = MI.getOperand(0).getReg();
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SrcReg = MI.getOperand(1).getReg();
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} else if (MI.getOpcode() == TargetInstrInfo::INSERT_SUBREG) {
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DstReg = MI.getOperand(0).getReg();
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SrcReg = MI.getOperand(2).getReg();
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}
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}
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if (DstReg) {
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IsSrcPhys = TargetRegisterInfo::isPhysicalRegister(SrcReg);
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IsDstPhys = TargetRegisterInfo::isPhysicalRegister(DstReg);
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return true;
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}
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return false;
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}
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/// isTwoAddrUse - Return true if the specified MI uses the specified register
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/// as a two-address use. If so, return the destination register by reference.
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static bool isTwoAddrUse(MachineInstr &MI, unsigned Reg, unsigned &DstReg) {
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const TargetInstrDesc &TID = MI.getDesc();
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for (unsigned i = 0, e = TID.getNumOperands(); i != e; ++i) {
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const MachineOperand &MO = MI.getOperand(i);
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if (!MO.isReg() || !MO.isUse() || MO.getReg() != Reg)
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continue;
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int ti = TID.getOperandConstraint(i, TOI::TIED_TO);
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if (ti != -1) {
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DstReg = MI.getOperand(ti).getReg();
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return true;
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}
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}
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return false;
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}
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/// findOnlyInterestingUse - Given a register, if has a single in-basic block
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/// use, return the use instruction if it's a copy or a two-address use.
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static
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MachineInstr *findOnlyInterestingUse(unsigned Reg, MachineBasicBlock *MBB,
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MachineRegisterInfo *MRI,
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const TargetInstrInfo *TII,
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bool &isCopy,
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unsigned &DstReg, bool &IsDstPhys) {
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MachineRegisterInfo::use_iterator UI = MRI->use_begin(Reg);
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if (UI == MRI->use_end())
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return 0;
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MachineInstr &UseMI = *UI;
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if (++UI != MRI->use_end())
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// More than one use.
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return 0;
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if (UseMI.getParent() != MBB)
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return 0;
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unsigned SrcReg;
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bool IsSrcPhys;
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if (isCopyToReg(UseMI, TII, SrcReg, DstReg, IsSrcPhys, IsDstPhys))
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return &UseMI;
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IsDstPhys = false;
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if (isTwoAddrUse(UseMI, Reg, DstReg))
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return &UseMI;
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return 0;
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}
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/// getMappedReg - Return the physical register the specified virtual register
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/// might be mapped to.
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static unsigned
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getMappedReg(unsigned Reg, DenseMap<unsigned, unsigned> &RegMap) {
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while (TargetRegisterInfo::isVirtualRegister(Reg)) {
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DenseMap<unsigned, unsigned>::iterator SI = RegMap.find(Reg);
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if (SI == RegMap.end())
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return 0;
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Reg = SI->second;
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}
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if (TargetRegisterInfo::isPhysicalRegister(Reg))
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return Reg;
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return 0;
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}
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/// regsAreCompatible - Return true if the two registers are equal or aliased.
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///
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static bool
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regsAreCompatible(unsigned RegA, unsigned RegB, const TargetRegisterInfo *TRI) {
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if (RegA == RegB)
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return true;
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if (!RegA || !RegB)
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return false;
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return TRI->regsOverlap(RegA, RegB);
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}
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/// isProfitableToReMat - Return true if it's potentially profitable to commute
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/// the two-address instruction that's being processed.
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bool
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TwoAddressInstructionPass::isProfitableToCommute(unsigned regB, unsigned regC,
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MachineInstr *MI, MachineBasicBlock *MBB,
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unsigned Dist, DenseMap<MachineInstr*, unsigned> &DistanceMap) {
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unsigned Dist) {
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// Determine if it's profitable to commute this two address instruction. In
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// general, we want no uses between this instruction and the definition of
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// the two-address register.
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@ -323,16 +432,31 @@ TwoAddressInstructionPass::isProfitableToCommute(unsigned regB, unsigned regC,
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// %reg1030<def> = ADD8rr %reg1028<kill>, %reg1029<kill>, %EFLAGS<imp-def,dead>
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// let's see if it's worth commuting it.
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// Look for situations like this:
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// %reg1024<def> = MOV r1
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// %reg1025<def> = MOV r0
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// %reg1026<def> = ADD %reg1024, %reg1025
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// r0 = MOV %reg1026
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// Commute the ADD to hopefully eliminate an otherwise unavoidable copy.
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unsigned FromRegB = getMappedReg(regB, SrcRegMap);
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unsigned FromRegC = getMappedReg(regC, SrcRegMap);
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unsigned ToRegB = getMappedReg(regB, DstRegMap);
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unsigned ToRegC = getMappedReg(regC, DstRegMap);
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if (!regsAreCompatible(FromRegB, ToRegB, TRI) &&
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(regsAreCompatible(FromRegB, ToRegC, TRI) ||
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regsAreCompatible(FromRegC, ToRegB, TRI)))
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return true;
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// If there is a use of regC between its last def (could be livein) and this
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// instruction, then bail.
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unsigned LastDefC = 0;
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if (!NoUseAfterLastDef(regC, MBB, Dist, DistanceMap, LastDefC))
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if (!NoUseAfterLastDef(regC, MBB, Dist, LastDefC))
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return false;
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// If there is a use of regB between its last def (could be livein) and this
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// instruction, then go ahead and make this transformation.
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unsigned LastDefB = 0;
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if (!NoUseAfterLastDef(regB, MBB, Dist, DistanceMap, LastDefB))
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if (!NoUseAfterLastDef(regB, MBB, Dist, LastDefB))
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return true;
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// Since there are no intervening uses for both registers, then commute
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@ -346,8 +470,7 @@ TwoAddressInstructionPass::isProfitableToCommute(unsigned regB, unsigned regC,
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bool
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TwoAddressInstructionPass::CommuteInstruction(MachineBasicBlock::iterator &mi,
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MachineFunction::iterator &mbbi,
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unsigned RegC, unsigned Dist,
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DenseMap<MachineInstr*, unsigned> &DistanceMap) {
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unsigned RegB, unsigned RegC, unsigned Dist) {
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MachineInstr *MI = mi;
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DOUT << "2addr: COMMUTING : " << *MI;
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MachineInstr *NewMI = TII->commuteInstruction(MI);
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@ -369,9 +492,91 @@ TwoAddressInstructionPass::CommuteInstruction(MachineBasicBlock::iterator &mi,
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mi = NewMI;
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DistanceMap.insert(std::make_pair(NewMI, Dist));
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}
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// Update source register map.
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unsigned FromRegC = getMappedReg(RegC, SrcRegMap);
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if (FromRegC) {
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unsigned RegA = MI->getOperand(0).getReg();
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SrcRegMap[RegA] = FromRegC;
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}
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return true;
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}
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/// ProcessCopy - If the specified instruction is not yet processed, process it
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/// if it's a copy. For a copy instruction, we find the physical registers the
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/// source and destination registers might be mapped to. These are kept in
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/// point-to maps used to determine future optimizations. e.g.
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/// v1024 = mov r0
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/// v1025 = mov r1
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/// v1026 = add v1024, v1025
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/// r1 = mov r1026
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/// If 'add' is a two-address instruction, v1024, v1026 are both potentially
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/// coalesced to r0 (from the input side). v1025 is mapped to r1. v1026 is
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/// potentially joined with r1 on the output side. It's worthwhile to commute
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/// 'add' to eliminate a copy.
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void TwoAddressInstructionPass::ProcessCopy(MachineInstr *MI,
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MachineBasicBlock *MBB,
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SmallPtrSet<MachineInstr*, 8> &Processed) {
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if (Processed.count(MI))
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return;
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bool IsSrcPhys, IsDstPhys;
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unsigned SrcReg, DstReg;
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if (!isCopyToReg(*MI, TII, SrcReg, DstReg, IsSrcPhys, IsDstPhys))
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return;
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if (IsDstPhys && !IsSrcPhys)
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DstRegMap.insert(std::make_pair(SrcReg, DstReg));
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else if (!IsDstPhys && IsSrcPhys) {
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bool isNew =
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SrcRegMap.insert(std::make_pair(DstReg, SrcReg)).second;
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isNew = isNew; // Silence compiler warning.
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assert(isNew && "Can't map to two src physical registers!");
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SmallVector<unsigned, 4> VirtRegPairs;
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bool isCopy = false;
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unsigned NewReg = 0;
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while (MachineInstr *UseMI = findOnlyInterestingUse(DstReg, MBB, MRI,TII,
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isCopy, NewReg, IsDstPhys)) {
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if (isCopy) {
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if (Processed.insert(UseMI))
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break;
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}
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DenseMap<MachineInstr*, unsigned>::iterator DI = DistanceMap.find(UseMI);
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if (DI != DistanceMap.end())
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// Earlier in the same MBB.Reached via a back edge.
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break;
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if (IsDstPhys) {
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VirtRegPairs.push_back(NewReg);
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break;
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}
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bool isNew = SrcRegMap.insert(std::make_pair(NewReg, DstReg)).second;
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isNew = isNew; // Silence compiler warning.
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assert(isNew && "Can't map to two src physical registers!");
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VirtRegPairs.push_back(NewReg);
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DstReg = NewReg;
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}
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if (!VirtRegPairs.empty()) {
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unsigned ToReg = VirtRegPairs.back();
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VirtRegPairs.pop_back();
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while (!VirtRegPairs.empty()) {
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unsigned FromReg = VirtRegPairs.back();
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VirtRegPairs.pop_back();
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bool isNew = DstRegMap.insert(std::make_pair(FromReg, ToReg)).second;
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isNew = isNew; // Silence compiler warning.
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assert(isNew && "Can't map to two dst physical registers!");
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ToReg = FromReg;
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}
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}
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}
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Processed.insert(MI);
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}
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/// isSafeToDelete - If the specified instruction does not produce any side
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/// effects and all of its defs are dead, then it's safe to delete.
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static bool isSafeToDelete(MachineInstr *MI, const TargetInstrInfo *TII) {
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@ -411,14 +616,14 @@ bool TwoAddressInstructionPass::runOnMachineFunction(MachineFunction &MF) {
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BitVector ReMatRegs;
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ReMatRegs.resize(MRI->getLastVirtReg()+1);
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// DistanceMap - Keep track the distance of a MI from the start of the
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// current basic block.
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DenseMap<MachineInstr*, unsigned> DistanceMap;
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SmallPtrSet<MachineInstr*, 8> Processed;
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for (MachineFunction::iterator mbbi = MF.begin(), mbbe = MF.end();
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mbbi != mbbe; ++mbbi) {
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unsigned Dist = 0;
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DistanceMap.clear();
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SrcRegMap.clear();
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DstRegMap.clear();
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Processed.clear();
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for (MachineBasicBlock::iterator mi = mbbi->begin(), me = mbbi->end();
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mi != me; ) {
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MachineBasicBlock::iterator nmi = next(mi);
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@ -426,6 +631,9 @@ bool TwoAddressInstructionPass::runOnMachineFunction(MachineFunction &MF) {
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bool FirstTied = true;
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DistanceMap.insert(std::make_pair(mi, ++Dist));
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ProcessCopy(&*mi, &*mbbi, Processed);
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for (unsigned si = 1, e = TID.getNumOperands(); si < e; ++si) {
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int ti = TID.getOperandConstraint(si, TOI::TIED_TO);
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if (ti == -1)
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@ -489,7 +697,7 @@ bool TwoAddressInstructionPass::runOnMachineFunction(MachineFunction &MF) {
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"Not a proper commutative instruction!");
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unsigned regC = mi->getOperand(3-si).getReg();
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if (mi->killsRegister(regC)) {
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if (CommuteInstruction(mi, mbbi, regC, Dist, DistanceMap)) {
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if (CommuteInstruction(mi, mbbi, regB, regC, Dist)) {
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++NumCommuted;
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regB = regC;
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goto InstructionRearranged;
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@ -536,8 +744,8 @@ bool TwoAddressInstructionPass::runOnMachineFunction(MachineFunction &MF) {
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// If it's profitable to commute the instruction, do so.
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if (TID.isCommutable() && mi->getNumOperands() >= 3) {
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unsigned regC = mi->getOperand(3-si).getReg();
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if (isProfitableToCommute(regB, regC, mi, mbbi, Dist, DistanceMap))
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if (CommuteInstruction(mi, mbbi, regC, Dist, DistanceMap)) {
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if (isProfitableToCommute(regB, regC, mi, mbbi, Dist))
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if (CommuteInstruction(mi, mbbi, regB, regC, Dist)) {
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++NumAggrCommuted;
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++NumCommuted;
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regB = regC;
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@ -552,7 +760,7 @@ bool TwoAddressInstructionPass::runOnMachineFunction(MachineFunction &MF) {
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if (DefMI &&
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DefMI->getDesc().isAsCheapAsAMove() &&
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DefMI->isSafeToReMat(TII, regB) &&
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isProfitableToReMat(regB, rc, mi, DefMI, mbbi, Dist,DistanceMap)){
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isProfitableToReMat(regB, rc, mi, DefMI, mbbi, Dist)){
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DEBUG(cerr << "2addr: REMATTING : " << *DefMI << "\n");
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TII->reMaterialize(*mbbi, mi, regA, DefMI);
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ReMatRegs.set(regB);
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15
test/CodeGen/X86/twoaddr-coalesce-2.ll
Normal file
15
test/CodeGen/X86/twoaddr-coalesce-2.ll
Normal file
@ -0,0 +1,15 @@
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; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 -stats |& \
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; RUN: grep {twoaddrinstr} | grep {Number of instructions aggressively commuted}
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; rdar://6480363
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target triple = "i386-apple-darwin9.6"
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define <2 x double> @t(<2 x double> %A, <2 x double> %B, <2 x double> %C) nounwind readnone {
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entry:
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%tmp.i3 = bitcast <2 x double> %B to <2 x i64> ; <<2 x i64>> [#uses=1]
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%tmp2.i = or <2 x i64> %tmp.i3, <i64 4607632778762754458, i64 4607632778762754458> ; <<2 x i64>> [#uses=1]
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%tmp3.i = bitcast <2 x i64> %tmp2.i to <2 x double> ; <<2 x double>> [#uses=1]
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%tmp.i2 = add <2 x double> %tmp3.i, %A ; <<2 x double>> [#uses=1]
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%tmp.i = add <2 x double> %tmp.i2, %C ; <<2 x double>> [#uses=1]
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ret <2 x double> %tmp.i
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}
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@ -1,4 +1,4 @@
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; RUN: llvm-as < %s | llc -march=x86 -join-cross-class-copies -stats |& \
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; RUN: llvm-as < %s | llc -march=x86 -stats |& \
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; RUN: grep {twoaddrinstr} | grep {Number of instructions aggressively commuted}
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; rdar://6523745
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