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X86: replace SUB with CMP if possible

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This patch will optimize the following
    movq    %rdi, %rax
    subq    %rsi, %rax
    cmovsq  %rsi, %rdi
    movq    %rdi, %rax
to
    cmpq    %rsi, %rdi
    cmovsq  %rsi, %rdi
    movq    %rdi, %rax

Perform this optimization if the actual result of SUB is not used.

rdar: 11540023


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158126 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Manman Ren 2012-06-07 00:42:47 +00:00
parent d66ec52b62
commit 87253c2ebd
2 changed files with 25 additions and 1 deletions
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15
lib/Target/X86/X86ISelLowering.cpp
View File

@ -8271,7 +8271,13 @@ SDValue X86TargetLowering::EmitTest(SDValue Op, unsigned X86CC,
// Otherwise use a regular EFLAGS-setting instruction.
switch (Op.getNode()->getOpcode()) {
default: llvm_unreachable("unexpected operator!");
case ISD::SUB: Opcode = X86ISD::SUB; break;
case ISD::SUB:
// If the only use of SUB is EFLAGS, use CMP instead.
if (Op.hasOneUse())
Opcode = X86ISD::CMP;
else
Opcode = X86ISD::SUB;
break;
case ISD::OR: Opcode = X86ISD::OR; break;
case ISD::XOR: Opcode = X86ISD::XOR; break;
case ISD::AND: Opcode = X86ISD::AND; break;
@ -8297,6 +8303,13 @@ SDValue X86TargetLowering::EmitTest(SDValue Op, unsigned X86CC,
return DAG.getNode(X86ISD::CMP, dl, MVT::i32, Op,
DAG.getConstant(0, Op.getValueType()));
if (Opcode == X86ISD::CMP) {
SDValue New = DAG.getNode(Opcode, dl, MVT::i32, Op.getOperand(0),
Op.getOperand(1));
DAG.ReplaceAllUsesWith(Op, New);
return SDValue(New.getNode(), 0);
}
SDVTList VTs = DAG.getVTList(Op.getValueType(), MVT::i32);
SmallVector<SDValue, 4> Ops;
for (unsigned i = 0; i != NumOperands; ++i)

11
test/CodeGen/X86/jump_sign.ll
View File

@ -83,3 +83,14 @@ entry:
%cond = select i1 %cmp, i32 %sub, i32 0
ret i32 %cond
}
; rdar://11540023
define i32 @n(i32 %x, i32 %y) nounwind {
entry:
; CHECK: n:
; CHECK-NOT: sub
; CHECK: cmp
%sub = sub nsw i32 %x, %y
%cmp = icmp slt i32 %sub, 0
%y.x = select i1 %cmp, i32 %y, i32 %x
ret i32 %y.x
}