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X86: replace SUB with CMP if possible
This patch will optimize the following movq %rdi, %rax subq %rsi, %rax cmovsq %rsi, %rdi movq %rdi, %rax to cmpq %rsi, %rdi cmovsq %rsi, %rdi movq %rdi, %rax Perform this optimization if the actual result of SUB is not used. rdar: 11540023 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158126 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -8271,7 +8271,13 @@ SDValue X86TargetLowering::EmitTest(SDValue Op, unsigned X86CC,
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// Otherwise use a regular EFLAGS-setting instruction.
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switch (Op.getNode()->getOpcode()) {
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default: llvm_unreachable("unexpected operator!");
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case ISD::SUB: Opcode = X86ISD::SUB; break;
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case ISD::SUB:
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// If the only use of SUB is EFLAGS, use CMP instead.
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if (Op.hasOneUse())
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Opcode = X86ISD::CMP;
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else
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Opcode = X86ISD::SUB;
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break;
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case ISD::OR: Opcode = X86ISD::OR; break;
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case ISD::XOR: Opcode = X86ISD::XOR; break;
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case ISD::AND: Opcode = X86ISD::AND; break;
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@ -8297,6 +8303,13 @@ SDValue X86TargetLowering::EmitTest(SDValue Op, unsigned X86CC,
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return DAG.getNode(X86ISD::CMP, dl, MVT::i32, Op,
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DAG.getConstant(0, Op.getValueType()));
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if (Opcode == X86ISD::CMP) {
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SDValue New = DAG.getNode(Opcode, dl, MVT::i32, Op.getOperand(0),
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Op.getOperand(1));
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DAG.ReplaceAllUsesWith(Op, New);
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return SDValue(New.getNode(), 0);
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}
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SDVTList VTs = DAG.getVTList(Op.getValueType(), MVT::i32);
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SmallVector<SDValue, 4> Ops;
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for (unsigned i = 0; i != NumOperands; ++i)
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@ -83,3 +83,14 @@ entry:
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%cond = select i1 %cmp, i32 %sub, i32 0
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ret i32 %cond
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}
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; rdar://11540023
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define i32 @n(i32 %x, i32 %y) nounwind {
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entry:
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; CHECK: n:
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; CHECK-NOT: sub
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; CHECK: cmp
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%sub = sub nsw i32 %x, %y
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%cmp = icmp slt i32 %sub, 0
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%y.x = select i1 %cmp, i32 %y, i32 %x
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ret i32 %y.x
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}
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