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[x86] Make this test check everything for both SSE2 and AVX1 modes,

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using a common 'all' prefix for the common test output.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217063 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chandler Carruth 2014-09-03 19:39:10 +00:00
parent 39af4e655a
commit 87508f1d87
1 changed files with 97 additions and 83 deletions
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180
test/CodeGen/X86/vector-shuffle-128-v4.ll
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@ -1,186 +1,200 @@
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -x86-experimental-vector-shuffle-lowering | FileCheck %s --check-prefix=CHECK-SSE2
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -mattr=+avx -x86-experimental-vector-shuffle-lowering | FileCheck %s --check-prefix=CHECK-AVX1
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -x86-experimental-vector-shuffle-lowering | FileCheck %s --check-prefix=ALL --check-prefix=SSE2
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -mattr=+avx -x86-experimental-vector-shuffle-lowering | FileCheck %s --check-prefix=ALL --check-prefix=AVX1
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-unknown"
define <4 x i32> @shuffle_v4i32_0001(<4 x i32> %a, <4 x i32> %b) {
; CHECK-SSE2-LABEL: @shuffle_v4i32_0001
; CHECK-SSE2: pshufd {{.*}} # xmm0 = xmm0[0,0,0,1]
; CHECK-SSE2-NEXT: retq
; ALL-LABEL: @shuffle_v4i32_0001
; ALL: pshufd {{.*}} # xmm0 = xmm0[0,0,0,1]
; ALL-NEXT: retq
%shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 0, i32 0, i32 1>
ret <4 x i32> %shuffle
}
define <4 x i32> @shuffle_v4i32_0020(<4 x i32> %a, <4 x i32> %b) {
; CHECK-SSE2-LABEL: @shuffle_v4i32_0020
; CHECK-SSE2: pshufd {{.*}} # xmm0 = xmm0[0,0,2,0]
; CHECK-SSE2-NEXT: retq
; ALL-LABEL: @shuffle_v4i32_0020
; ALL: pshufd {{.*}} # xmm0 = xmm0[0,0,2,0]
; ALL-NEXT: retq
%shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 0, i32 2, i32 0>
ret <4 x i32> %shuffle
}
define <4 x i32> @shuffle_v4i32_0112(<4 x i32> %a, <4 x i32> %b) {
; CHECK-SSE2-LABEL: @shuffle_v4i32_0112
; CHECK-SSE2: pshufd {{.*}} # xmm0 = xmm0[0,1,1,2]
; CHECK-SSE2-NEXT: retq
; ALL-LABEL: @shuffle_v4i32_0112
; ALL: pshufd {{.*}} # xmm0 = xmm0[0,1,1,2]
; ALL-NEXT: retq
%shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 1, i32 1, i32 2>
ret <4 x i32> %shuffle
}
define <4 x i32> @shuffle_v4i32_0300(<4 x i32> %a, <4 x i32> %b) {
; CHECK-SSE2-LABEL: @shuffle_v4i32_0300
; CHECK-SSE2: pshufd {{.*}} # xmm0 = xmm0[0,3,0,0]
; CHECK-SSE2-NEXT: retq
; ALL-LABEL: @shuffle_v4i32_0300
; ALL: pshufd {{.*}} # xmm0 = xmm0[0,3,0,0]
; ALL-NEXT: retq
%shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 3, i32 0, i32 0>
ret <4 x i32> %shuffle
}
define <4 x i32> @shuffle_v4i32_1000(<4 x i32> %a, <4 x i32> %b) {
; CHECK-SSE2-LABEL: @shuffle_v4i32_1000
; CHECK-SSE2: pshufd {{.*}} # xmm0 = xmm0[1,0,0,0]
; CHECK-SSE2-NEXT: retq
; ALL-LABEL: @shuffle_v4i32_1000
; ALL: pshufd {{.*}} # xmm0 = xmm0[1,0,0,0]
; ALL-NEXT: retq
%shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 1, i32 0, i32 0, i32 0>
ret <4 x i32> %shuffle
}
define <4 x i32> @shuffle_v4i32_2200(<4 x i32> %a, <4 x i32> %b) {
; CHECK-SSE2-LABEL: @shuffle_v4i32_2200
; CHECK-SSE2: pshufd {{.*}} # xmm0 = xmm0[2,2,0,0]
; CHECK-SSE2-NEXT: retq
; ALL-LABEL: @shuffle_v4i32_2200
; ALL: pshufd {{.*}} # xmm0 = xmm0[2,2,0,0]
; ALL-NEXT: retq
%shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 2, i32 2, i32 0, i32 0>
ret <4 x i32> %shuffle
}
define <4 x i32> @shuffle_v4i32_3330(<4 x i32> %a, <4 x i32> %b) {
; CHECK-SSE2-LABEL: @shuffle_v4i32_3330
; CHECK-SSE2: pshufd {{.*}} # xmm0 = xmm0[3,3,3,0]
; CHECK-SSE2-NEXT: retq
; ALL-LABEL: @shuffle_v4i32_3330
; ALL: pshufd {{.*}} # xmm0 = xmm0[3,3,3,0]
; ALL-NEXT: retq
%shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 3, i32 3, i32 3, i32 0>
ret <4 x i32> %shuffle
}
define <4 x i32> @shuffle_v4i32_3210(<4 x i32> %a, <4 x i32> %b) {
; CHECK-SSE2-LABEL: @shuffle_v4i32_3210
; CHECK-SSE2: pshufd {{.*}} # xmm0 = xmm0[3,2,1,0]
; CHECK-SSE2-NEXT: retq
; ALL-LABEL: @shuffle_v4i32_3210
; ALL: pshufd {{.*}} # xmm0 = xmm0[3,2,1,0]
; ALL-NEXT: retq
%shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 3, i32 2, i32 1, i32 0>
ret <4 x i32> %shuffle
}
define <4 x i32> @shuffle_v4i32_2121(<4 x i32> %a, <4 x i32> %b) {
; CHECK-AVX1-LABEL: @shuffle_v4i32_2121
; CHECK-AVX1: vpshufd {{.*}} # xmm0 = xmm0[2,1,2,1]
; CHECK-AVX1-NEXT: retq
; ALL-LABEL: @shuffle_v4i32_2121
; ALL: pshufd {{.*}} # xmm0 = xmm0[2,1,2,1]
; ALL-NEXT: retq
%shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 2, i32 1, i32 2, i32 1>
ret <4 x i32> %shuffle
}
define <4 x float> @shuffle_v4f32_0001(<4 x float> %a, <4 x float> %b) {
; CHECK-SSE2-LABEL: @shuffle_v4f32_0001
; CHECK-SSE2: shufps {{.*}} # xmm0 = xmm0[0,0,0,1]
; CHECK-SSE2-NEXT: retq
; ALL-LABEL: @shuffle_v4f32_0001
; ALL: shufps {{.*}} # xmm0 = xmm0[0,0,0,1]
; ALL-NEXT: retq
%shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 0, i32 0, i32 0, i32 1>
ret <4 x float> %shuffle
}
define <4 x float> @shuffle_v4f32_0020(<4 x float> %a, <4 x float> %b) {
; CHECK-SSE2-LABEL: @shuffle_v4f32_0020
; CHECK-SSE2: shufps {{.*}} # xmm0 = xmm0[0,0,2,0]
; CHECK-SSE2-NEXT: retq
; ALL-LABEL: @shuffle_v4f32_0020
; ALL: shufps {{.*}} # xmm0 = xmm0[0,0,2,0]
; ALL-NEXT: retq
%shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 0, i32 0, i32 2, i32 0>
ret <4 x float> %shuffle
}
define <4 x float> @shuffle_v4f32_0300(<4 x float> %a, <4 x float> %b) {
; CHECK-SSE2-LABEL: @shuffle_v4f32_0300
; CHECK-SSE2: shufps {{.*}} # xmm0 = xmm0[0,3,0,0]
; CHECK-SSE2-NEXT: retq
; ALL-LABEL: @shuffle_v4f32_0300
; ALL: shufps {{.*}} # xmm0 = xmm0[0,3,0,0]
; ALL-NEXT: retq
%shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 0, i32 3, i32 0, i32 0>
ret <4 x float> %shuffle
}
define <4 x float> @shuffle_v4f32_1000(<4 x float> %a, <4 x float> %b) {
; CHECK-SSE2-LABEL: @shuffle_v4f32_1000
; CHECK-SSE2: shufps {{.*}} # xmm0 = xmm0[1,0,0,0]
; CHECK-SSE2-NEXT: retq
; ALL-LABEL: @shuffle_v4f32_1000
; ALL: shufps {{.*}} # xmm0 = xmm0[1,0,0,0]
; ALL-NEXT: retq
%shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 1, i32 0, i32 0, i32 0>
ret <4 x float> %shuffle
}
define <4 x float> @shuffle_v4f32_2200(<4 x float> %a, <4 x float> %b) {
; CHECK-SSE2-LABEL: @shuffle_v4f32_2200
; CHECK-SSE2: shufps {{.*}} # xmm0 = xmm0[2,2,0,0]
; CHECK-SSE2-NEXT: retq
; ALL-LABEL: @shuffle_v4f32_2200
; ALL: shufps {{.*}} # xmm0 = xmm0[2,2,0,0]
; ALL-NEXT: retq
%shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 2, i32 2, i32 0, i32 0>
ret <4 x float> %shuffle
}
define <4 x float> @shuffle_v4f32_3330(<4 x float> %a, <4 x float> %b) {
; CHECK-SSE2-LABEL: @shuffle_v4f32_3330
; CHECK-SSE2: shufps {{.*}} # xmm0 = xmm0[3,3,3,0]
; CHECK-SSE2-NEXT: retq
; ALL-LABEL: @shuffle_v4f32_3330
; ALL: shufps {{.*}} # xmm0 = xmm0[3,3,3,0]
; ALL-NEXT: retq
%shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 3, i32 3, i32 3, i32 0>
ret <4 x float> %shuffle
}
define <4 x float> @shuffle_v4f32_3210(<4 x float> %a, <4 x float> %b) {
; CHECK-SSE2-LABEL: @shuffle_v4f32_3210
; CHECK-SSE2: shufps {{.*}} # xmm0 = xmm0[3,2,1,0]
; CHECK-SSE2-NEXT: retq
; ALL-LABEL: @shuffle_v4f32_3210
; ALL: shufps {{.*}} # xmm0 = xmm0[3,2,1,0]
; ALL-NEXT: retq
%shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 3, i32 2, i32 1, i32 0>
ret <4 x float> %shuffle
}
define <4 x i32> @shuffle_v4i32_0124(<4 x i32> %a, <4 x i32> %b) {
; CHECK-SSE2-LABEL: @shuffle_v4i32_0124
; CHECK-SSE2: shufps {{.*}} # xmm1 = xmm1[0,0],xmm0[2,0]
; CHECK-SSE2-NEXT: shufps {{.*}} # xmm0 = xmm0[0,1],xmm1[2,0]
; CHECK-SSE2-NEXT: retq
; ALL-LABEL: @shuffle_v4i32_0124
; ALL: shufps {{.*}} # xmm1 = xmm1[0,0],xmm0[2,0]
; ALL-NEXT: shufps {{.*}} # xmm0 = xmm0[0,1],xmm1[2,0]
; ALL-NEXT: retq
%shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 1, i32 2, i32 4>
ret <4 x i32> %shuffle
}
define <4 x i32> @shuffle_v4i32_0142(<4 x i32> %a, <4 x i32> %b) {
; CHECK-SSE2-LABEL: @shuffle_v4i32_0142
; CHECK-SSE2: shufps {{.*}} # xmm1 = xmm1[0,0],xmm0[2,0]
; CHECK-SSE2-NEXT: shufps {{.*}} # xmm0 = xmm0[0,1],xmm1[0,2]
; CHECK-SSE2-NEXT: retq
; ALL-LABEL: @shuffle_v4i32_0142
; ALL: shufps {{.*}} # xmm1 = xmm1[0,0],xmm0[2,0]
; ALL-NEXT: shufps {{.*}} # xmm0 = xmm0[0,1],xmm1[0,2]
; ALL-NEXT: retq
%shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 1, i32 4, i32 2>
ret <4 x i32> %shuffle
}
define <4 x i32> @shuffle_v4i32_0412(<4 x i32> %a, <4 x i32> %b) {
; CHECK-SSE2-LABEL: @shuffle_v4i32_0412
; CHECK-SSE2: shufps {{.*}} # xmm1 = xmm1[0,0],xmm0[0,0]
; CHECK-SSE2-NEXT: shufps {{.*}} # xmm1 = xmm1[2,0],xmm0[1,2]
; CHECK-SSE2-NEXT: movaps %xmm1, %xmm0
; CHECK-SSE2-NEXT: retq
; SSE2-LABEL: @shuffle_v4i32_0412
; SSE2: shufps {{.*}} # xmm1 = xmm1[0,0],xmm0[0,0]
; SSE2-NEXT: shufps {{.*}} # xmm1 = xmm1[2,0],xmm0[1,2]
; SSE2-NEXT: movaps %xmm1, %xmm0
; SSE2-NEXT: retq
;
; AVX1-LABEL: @shuffle_v4i32_0412
; AVX1: vshufps {{.*}} # xmm1 = xmm1[0,0],xmm0[0,0]
; AVX1-NEXT: vshufps {{.*}} # xmm0 = xmm1[2,0],xmm0[1,2]
; AVX1-NEXT: retq
%shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 4, i32 1, i32 2>
ret <4 x i32> %shuffle
}
define <4 x i32> @shuffle_v4i32_4012(<4 x i32> %a, <4 x i32> %b) {
; CHECK-SSE2-LABEL: @shuffle_v4i32_4012
; CHECK-SSE2: shufps {{.*}} # xmm1 = xmm1[0,0],xmm0[0,0]
; CHECK-SSE2-NEXT: shufps {{.*}} # xmm1 = xmm1[0,2],xmm0[1,2]
; CHECK-SSE2-NEXT: movaps %xmm1, %xmm0
; CHECK-SSE2-NEXT: retq
; SSE2-LABEL: @shuffle_v4i32_4012
; SSE2: shufps {{.*}} # xmm1 = xmm1[0,0],xmm0[0,0]
; SSE2-NEXT: shufps {{.*}} # xmm1 = xmm1[0,2],xmm0[1,2]
; SSE2-NEXT: movaps %xmm1, %xmm0
; SSE2-NEXT: retq
;
; AVX1-LABEL: @shuffle_v4i32_4012
; AVX1: vshufps {{.*}} # xmm1 = xmm1[0,0],xmm0[0,0]
; AVX1-NEXT: vshufps {{.*}} # xmm0 = xmm1[0,2],xmm0[1,2]
; AVX1-NEXT: retq
%shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 4, i32 0, i32 1, i32 2>
ret <4 x i32> %shuffle
}
define <4 x i32> @shuffle_v4i32_0145(<4 x i32> %a, <4 x i32> %b) {
; CHECK-SSE2-LABEL: @shuffle_v4i32_0145
; CHECK-SSE2: punpcklqdq {{.*}} # xmm0 = xmm0[0],xmm1[0]
; CHECK-SSE2-NEXT: retq
; ALL-LABEL: @shuffle_v4i32_0145
; ALL: punpcklqdq {{.*}} # xmm0 = xmm0[0],xmm1[0]
; ALL-NEXT: retq
%shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 1, i32 4, i32 5>
ret <4 x i32> %shuffle
}
define <4 x i32> @shuffle_v4i32_0451(<4 x i32> %a, <4 x i32> %b) {
; CHECK-SSE2-LABEL: @shuffle_v4i32_0451
; CHECK-SSE2: shufps {{.*}} # xmm0 = xmm0[0,1],xmm1[0,1]
; CHECK-SSE2-NEXT: shufps {{.*}} # xmm0 = xmm0[0,2,3,1]
; CHECK-SSE2-NEXT: retq
; ALL-LABEL: @shuffle_v4i32_0451
; ALL: shufps {{.*}} # xmm0 = xmm0[0,1],xmm1[0,1]
; ALL-NEXT: shufps {{.*}} # xmm0 = xmm0[0,2,3,1]
; ALL-NEXT: retq
%shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 4, i32 5, i32 1>
ret <4 x i32> %shuffle
}
define <4 x i32> @shuffle_v4i32_4501(<4 x i32> %a, <4 x i32> %b) {
; CHECK-SSE2-LABEL: @shuffle_v4i32_4501
; CHECK-SSE2: punpcklqdq {{.*}} # xmm1 = xmm1[0],xmm0[0]
; CHECK-SSE2-NEXT: movdqa %xmm1, %xmm0
; CHECK-SSE2-NEXT: retq
; SSE2-LABEL: @shuffle_v4i32_4501
; SSE2: punpcklqdq {{.*}} # xmm1 = xmm1[0],xmm0[0]
; SSE2-NEXT: movdqa %xmm1, %xmm0
; SSE2-NEXT: retq
;
; AVX1-LABEL: @shuffle_v4i32_4501
; AVX1: punpcklqdq {{.*}} # xmm0 = xmm1[0],xmm0[0]
; AVX1-NEXT: retq
%shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 4, i32 5, i32 0, i32 1>
ret <4 x i32> %shuffle
}
define <4 x i32> @shuffle_v4i32_4015(<4 x i32> %a, <4 x i32> %b) {
; CHECK-SSE2-LABEL: @shuffle_v4i32_4015
; CHECK-SSE2: shufps {{.*}} # xmm0 = xmm0[0,1],xmm1[0,1]
; CHECK-SSE2-NEXT: shufps {{.*}} # xmm0 = xmm0[2,0,1,3]
; CHECK-SSE2-NEXT: retq
; ALL-LABEL: @shuffle_v4i32_4015
; ALL: shufps {{.*}} # xmm0 = xmm0[0,1],xmm1[0,1]
; ALL-NEXT: shufps {{.*}} # xmm0 = xmm0[2,0,1,3]
; ALL-NEXT: retq
%shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 4, i32 0, i32 1, i32 5>
ret <4 x i32> %shuffle
}