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AVX2: The BLENDPW instruction selects between vectors of v16i16 using an i8

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immediate. We can't use it here because the shuffle code does not check that
the lower part of the word is identical to the upper part.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155440 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Nadav Rotem 2012-04-24 11:27:53 +00:00
parent f4478f99dd
commit 87ffdbcb7b
1 changed files with 0 additions and 6 deletions
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6
lib/Target/X86/X86ISelLowering.cpp
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@ -5443,12 +5443,6 @@ static SDValue LowerVECTOR_SHUFFLEtoBlend(ShuffleVectorSDNode *SVOp,
ISDNo = X86ISD::BLENDPD;
OpTy = MVT::v4f64;
break;
case MVT::v16i16:
if (!Subtarget->hasAVX2())
return SDValue();
ISDNo = X86ISD::BLENDPW;
OpTy = MVT::v16i16;
break;
}
assert(ISDNo && "Invalid Op Number");