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misched: handle on-the-fly regpressure queries better for 2-addr
instructions without relying on liveintervals. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167526 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -43,7 +43,7 @@ struct RegisterPressure {
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/// class. This is only useful to account for spilling or rematerialization.
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void decrease(const TargetRegisterClass *RC, const TargetRegisterInfo *TRI);
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void dump(const TargetRegisterInfo *TRI);
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void dump(const TargetRegisterInfo *TRI) const;
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};
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/// RegisterPressure computed within a region of instructions delimited by
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@ -197,6 +197,7 @@ public:
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/// This result is complete if either advance() or recede() has returned true,
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/// or if closeRegion() was explicitly invoked.
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RegisterPressure &getPressure() { return P; }
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const RegisterPressure &getPressure() const { return P; }
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/// Get the register set pressure at the current position, which may be less
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/// than the pressure across the traversed region.
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@ -64,7 +64,7 @@ void RegisterPressure::decrease(const TargetRegisterClass *RC,
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}
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#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
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void RegisterPressure::dump(const TargetRegisterInfo *TRI) {
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void RegisterPressure::dump(const TargetRegisterInfo *TRI) const {
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dbgs() << "Live In: ";
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for (unsigned i = 0, e = LiveInRegs.size(); i < e; ++i)
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dbgs() << PrintReg(LiveInRegs[i], TRI) << " ";
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@ -322,10 +322,8 @@ struct RegisterOperands {
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if (findReg(MO.getReg(), isVReg, DeadDefs, TRI) == DeadDefs.end())
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DeadDefs.push_back(MO.getReg());
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}
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else {
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if (findReg(MO.getReg(), isVReg, Defs, TRI) == Defs.end())
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Defs.push_back(MO.getReg());
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}
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else if (findReg(MO.getReg(), isVReg, Defs, TRI) == Defs.end())
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Defs.push_back(MO.getReg());
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}
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}
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};
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@ -676,9 +674,16 @@ void RegPressureTracker::bumpUpwardPressure(const MachineInstr *MI) {
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decreaseVirtRegPressure(VirtRegOpers.DeadDefs);
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// Kill liveness at live defs.
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decreasePhysRegPressure(PhysRegOpers.Defs);
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decreaseVirtRegPressure(VirtRegOpers.Defs);
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for (unsigned i = 0, e = PhysRegOpers.Defs.size(); i < e; ++i) {
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unsigned Reg = PhysRegOpers.Defs[i];
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if (!findReg(Reg, false, PhysRegOpers.Uses, TRI))
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decreasePhysRegPressure(PhysRegOpers.Defs);
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}
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for (unsigned i = 0, e = VirtRegOpers.Defs.size(); i < e; ++i) {
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unsigned Reg = VirtRegOpers.Defs[i];
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if (!findReg(Reg, true, VirtRegOpers.Uses, TRI))
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decreaseVirtRegPressure(VirtRegOpers.Defs);
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}
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// Generate liveness for uses.
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for (unsigned i = 0, e = PhysRegOpers.Uses.size(); i < e; ++i) {
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unsigned Reg = PhysRegOpers.Uses[i];
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