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Fix PR2850 and PR2863. Only generate movddup for 128-bit SSE vector shuffles.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57210 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -3954,6 +3954,7 @@ X86TargetLowering::LowerVECTOR_SHUFFLE(SDValue Op, SelectionDAG &DAG) {
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// Canonicalize movddup shuffles.
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if (V2IsUndef && Subtarget->hasSSE2() &&
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VT.getSizeInBits() == 128 &&
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X86::isMOVDDUPMask(PermMask.getNode()))
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return CanonicalizeMovddup(Op, V1, PermMask, DAG, Subtarget->hasSSE3());
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12
test/CodeGen/X86/2008-10-06-MMXISelBug.ll
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12
test/CodeGen/X86/2008-10-06-MMXISelBug.ll
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@ -0,0 +1,12 @@
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; RUN: llvm-as < %s | llc -march=x86 -mattr=+mmx,+sse2
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; PR2850
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@tmp_V2i = common global <2 x i32> zeroinitializer ; <<2 x i32>*> [#uses=2]
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define void @f0() nounwind {
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entry:
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%0 = load <2 x i32>* @tmp_V2i, align 8 ; <<2 x i32>> [#uses=1]
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%1 = shufflevector <2 x i32> %0, <2 x i32> undef, <2 x i32> zeroinitializer ; <<2 x i32>> [#uses=1]
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store <2 x i32> %1, <2 x i32>* @tmp_V2i, align 8
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ret void
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}
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