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Rely on the code in MatchAddress to do this work. Otherwise we fail to
match (X+Y)+(Z << 1), because we match the X+Y first, consuming the index register, then there is no place to put the Z. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19652 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -1579,18 +1579,20 @@ unsigned ISel::SelectExpr(SDOperand N) {
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// See if we can codegen this as an LEA to fold operations together.
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if (N.getValueType() == MVT::i32) {
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ExprMap.erase(N);
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X86ISelAddressMode AM;
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if (!MatchAddress(Op0, AM) && !MatchAddress(Op1, AM)) {
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// If this is not just an add, emit the LEA. For a simple add (like
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// reg+reg or reg+imm), we just emit an add. It might be a good idea to
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// leave this as LEA, then peephole it to 'ADD' after two address elim
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// happens.
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if (AM.Scale != 1 || AM.BaseType == X86ISelAddressMode::FrameIndexBase||
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AM.GV || (AM.Base.Reg.Val && AM.IndexReg.Val && AM.Disp)) {
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X86AddressMode XAM = SelectAddrExprs(AM);
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addFullAddress(BuildMI(BB, X86::LEA32r, 4, Result), XAM);
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return Result;
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}
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MatchAddress(N, AM);
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ExprMap[N] = Result;
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// If this is not just an add, emit the LEA. For a simple add (like
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// reg+reg or reg+imm), we just emit an add. It might be a good idea to
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// leave this as LEA, then peephole it to 'ADD' after two address elim
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// happens.
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if (AM.Scale != 1 || AM.BaseType == X86ISelAddressMode::FrameIndexBase||
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AM.GV || (AM.Base.Reg.Val && AM.IndexReg.Val && AM.Disp)) {
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X86AddressMode XAM = SelectAddrExprs(AM);
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addFullAddress(BuildMI(BB, X86::LEA32r, 4, Result), XAM);
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return Result;
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}
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}
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