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Update the discussion of TargetRegisterDesc

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23563 91177308-0d34-0410-b5e6-96231b3b80d8
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Chris Lattner 2005-09-30 17:46:55 +00:00
parent 22842105de
commit 88a06d2e3e
1 changed files with 3 additions and 3 deletions
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docs/CodeGenerator.html
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@ -358,9 +358,9 @@ description) are unique small numbers, and virtual registers are generally
large.</p>
<p>Each register in the processor description has an associated
<tt>MRegisterDesc</tt> entry, which provides a textual name for the register
(used for assembly output and debugging dumps), a set of aliases (used to
indicate that one register overlaps with another), and some flag bits.
<tt>TargetRegisterDesc</tt> entry, which provides a textual name for the register
(used for assembly output and debugging dumps) and a set of aliases (used to
indicate that one register overlaps with another).
</p>
<p>In addition to the per-register description, the <tt>MRegisterInfo</tt> class