mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-10-01 10:57:21 +00:00
significantly refactor all the addressing mode matching logic
into a new AddressingModeMatcher class. This makes it easier to reason about and reduces passing around of stuff, but has no functionality change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60012 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner
parent
bb3204a440
commit
88a5c832ac
@ -53,9 +53,8 @@ namespace {
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bool CanMergeBlocks(const BasicBlock *BB, const BasicBlock *DestBB) const;
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void EliminateMostlyEmptyBlock(BasicBlock *BB);
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bool OptimizeBlock(BasicBlock &BB);
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bool OptimizeLoadStoreInst(Instruction *I, Value *Addr,
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const Type *AccessTy,
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DenseMap<Value*,Value*> &SunkAddrs);
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bool OptimizeMemoryInst(Instruction *I, Value *Addr, const Type *AccessTy,
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DenseMap<Value*,Value*> &SunkAddrs);
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bool OptimizeInlineAsmInst(Instruction *I, CallSite CS,
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DenseMap<Value*,Value*> &SunkAddrs);
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bool OptimizeExtUses(Instruction *I);
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@ -486,6 +485,10 @@ static void EraseDeadInstructions(Value *V) {
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}
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}
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//===----------------------------------------------------------------------===//
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// Addressing Mode Analysis and Optimization
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//===----------------------------------------------------------------------===//
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namespace {
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/// ExtAddrMode - This is an extended version of TargetLowering::AddrMode
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/// which holds actual Value*'s for register values.
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@ -506,7 +509,6 @@ static OStream &operator<<(OStream &OS, const ExtAddrMode &AM) {
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return OS;
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}
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void ExtAddrMode::print(OStream &OS) const {
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bool NeedPlus = false;
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OS << "[";
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@ -527,13 +529,44 @@ void ExtAddrMode::print(OStream &OS) const {
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OS << ']';
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}
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/// TryMatchingScaledValue - Try adding ScaleReg*Scale to the specified
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/// addressing mode. Return true if this addr mode is legal for the target,
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namespace {
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/// AddressingModeMatcher - This class exposes a single public method, which is
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/// used to construct a "maximal munch" of the addressing mode for the target
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/// specified by TLI for an access to "V" with an access type of AccessTy. This
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/// returns the addressing mode that is actually matched by value, but also
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/// returns the list of instructions involved in that addressing computation in
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/// AddrModeInsts.
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class AddressingModeMatcher {
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SmallVectorImpl<Instruction*> &AddrModeInsts;
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const TargetLowering &TLI;
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const Type *AccessTy;
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ExtAddrMode &AddrMode;
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AddressingModeMatcher(SmallVectorImpl<Instruction*> &AMI,
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const TargetLowering &T, const Type *AT,ExtAddrMode &AM)
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: AddrModeInsts(AMI), TLI(T), AccessTy(AT), AddrMode(AM) {}
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public:
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static ExtAddrMode Match(Value *V, const Type *AccessTy,
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SmallVectorImpl<Instruction*> &AddrModeInsts,
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const TargetLowering &TLI) {
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ExtAddrMode Result;
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bool Success =
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AddressingModeMatcher(AddrModeInsts,TLI,AccessTy,Result).MatchAddr(V, 0);
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Success = Success; assert(Success && "Couldn't select *anything*?");
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return Result;
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}
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private:
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bool MatchScaledValue(Value *ScaleReg, int64_t Scale);
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bool MatchAddr(Value *V, unsigned Depth);
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bool MatchOperationAddr(User *Operation, unsigned Opcode, unsigned Depth);
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};
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} // end anonymous namespace
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/// MatchScaledValue - Try adding ScaleReg*Scale to the current addressing mode.
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/// Return true and update AddrMode if this addr mode is legal for the target,
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/// false if not.
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static bool TryMatchingScaledValue(Value *ScaleReg, int64_t Scale,
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const Type *AccessTy, ExtAddrMode &AddrMode,
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SmallVectorImpl<Instruction*> &AddrModeInsts,
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const TargetLowering &TLI, unsigned Depth) {
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bool AddressingModeMatcher::MatchScaledValue(Value *ScaleReg, int64_t Scale) {
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// If we already have a scale of this value, we can add to it, otherwise, we
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// need an available scale field.
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if (AddrMode.Scale != 0 && AddrMode.ScaledReg != ScaleReg)
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@ -566,6 +599,7 @@ static bool TryMatchingScaledValue(Value *ScaleReg, int64_t Scale,
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if (TLI.isLegalAddressingMode(TestAddrMode, AccessTy)) {
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AddrModeInsts.push_back(cast<Instruction>(ScaleReg));
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AddrMode = TestAddrMode;
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return true;
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}
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}
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@ -573,46 +607,31 @@ static bool TryMatchingScaledValue(Value *ScaleReg, int64_t Scale,
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return true;
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}
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static bool FindMaximalLegalAddressingMode(Value *Addr, const Type *AccessTy,
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ExtAddrMode &AddrMode,
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SmallVectorImpl<Instruction*> &AMI,
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const TargetLowering &TLI,
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unsigned Depth);
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/// FindMaximalLegalAddressingModeForOperation - Given an instruction or
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/// constant expr, see if we can fold the operation into the addressing mode.
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/// If so, update the addressing mode and return true, otherwise return false.
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static bool
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FindMaximalLegalAddressingModeForOperation(User *AddrInst, unsigned Opcode,
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const Type *AccessTy,
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ExtAddrMode &AddrMode,
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SmallVectorImpl<Instruction*> &AddrModeInsts,
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const TargetLowering &TLI,
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unsigned Depth) {
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/// MatchOperationAddr - Given an instruction or constant expr, see if we can
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/// fold the operation into the addressing mode. If so, update the addressing
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/// mode and return true, otherwise return false without modifying AddrMode.
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bool AddressingModeMatcher::MatchOperationAddr(User *AddrInst, unsigned Opcode,
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unsigned Depth) {
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// Avoid exponential behavior on extremely deep expression trees.
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if (Depth >= 5) return false;
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switch (Opcode) {
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case Instruction::PtrToInt:
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// PtrToInt is always a noop, as we know that the int type is pointer sized.
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if (FindMaximalLegalAddressingMode(AddrInst->getOperand(0), AccessTy,
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AddrMode, AddrModeInsts, TLI, Depth))
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return true;
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break;
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return MatchAddr(AddrInst->getOperand(0), Depth);
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case Instruction::IntToPtr:
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// This inttoptr is a no-op if the integer type is pointer sized.
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if (TLI.getValueType(AddrInst->getOperand(0)->getType()) ==
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TLI.getPointerTy()) {
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if (FindMaximalLegalAddressingMode(AddrInst->getOperand(0), AccessTy,
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AddrMode, AddrModeInsts, TLI, Depth))
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return true;
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}
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break;
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TLI.getPointerTy())
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return MatchAddr(AddrInst->getOperand(0), Depth);
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return false;
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case Instruction::Add: {
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// Check to see if we can merge in the RHS then the LHS. If so, we win.
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ExtAddrMode BackupAddrMode = AddrMode;
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unsigned OldSize = AddrModeInsts.size();
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if (FindMaximalLegalAddressingMode(AddrInst->getOperand(1), AccessTy,
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AddrMode, AddrModeInsts, TLI, Depth+1) &&
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FindMaximalLegalAddressingMode(AddrInst->getOperand(0), AccessTy,
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AddrMode, AddrModeInsts, TLI, Depth+1))
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if (MatchAddr(AddrInst->getOperand(1), Depth+1) &&
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MatchAddr(AddrInst->getOperand(0), Depth+1))
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return true;
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// Restore the old addr mode info.
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@ -620,10 +639,8 @@ FindMaximalLegalAddressingModeForOperation(User *AddrInst, unsigned Opcode,
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AddrModeInsts.resize(OldSize);
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// Otherwise this was over-aggressive. Try merging in the LHS then the RHS.
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if (FindMaximalLegalAddressingMode(AddrInst->getOperand(0), AccessTy,
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AddrMode, AddrModeInsts, TLI, Depth+1) &&
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FindMaximalLegalAddressingMode(AddrInst->getOperand(1), AccessTy,
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AddrMode, AddrModeInsts, TLI, Depth+1))
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if (MatchAddr(AddrInst->getOperand(0), Depth+1) &&
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MatchAddr(AddrInst->getOperand(1), Depth+1))
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return true;
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// Otherwise we definitely can't merge the ADD in.
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@ -641,15 +658,12 @@ FindMaximalLegalAddressingModeForOperation(User *AddrInst, unsigned Opcode,
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case Instruction::Shl: {
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// Can only handle X*C and X << C.
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ConstantInt *RHS = dyn_cast<ConstantInt>(AddrInst->getOperand(1));
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if (!RHS) break;
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if (!RHS) return false;
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int64_t Scale = RHS->getSExtValue();
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if (Opcode == Instruction::Shl)
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Scale = 1 << Scale;
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if (TryMatchingScaledValue(AddrInst->getOperand(0), Scale, AccessTy,
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AddrMode, AddrModeInsts, TLI, Depth))
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return true;
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break;
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return MatchScaledValue(AddrInst->getOperand(0), Scale);
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}
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case Instruction::GetElementPtr: {
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// Scan the GEP. We check it if it contains constant offsets and at most
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@ -664,7 +678,7 @@ FindMaximalLegalAddressingModeForOperation(User *AddrInst, unsigned Opcode,
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if (const StructType *STy = dyn_cast<StructType>(*GTI)) {
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const StructLayout *SL = TD->getStructLayout(STy);
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unsigned Idx =
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cast<ConstantInt>(AddrInst->getOperand(i))->getZExtValue();
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cast<ConstantInt>(AddrInst->getOperand(i))->getZExtValue();
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ConstantOffset += SL->getElementOffset(Idx);
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} else {
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uint64_t TypeSize = TD->getABITypeSize(GTI.getIndexedType());
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@ -672,10 +686,8 @@ FindMaximalLegalAddressingModeForOperation(User *AddrInst, unsigned Opcode,
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ConstantOffset += CI->getSExtValue()*TypeSize;
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} else if (TypeSize) { // Scales of zero don't do anything.
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// We only allow one variable index at the moment.
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if (VariableOperand != -1) {
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VariableOperand = -2;
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break;
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}
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if (VariableOperand != -1)
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return false;
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// Remember the variable index.
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VariableOperand = i;
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@ -684,81 +696,70 @@ FindMaximalLegalAddressingModeForOperation(User *AddrInst, unsigned Opcode,
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}
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}
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// If the GEP had multiple variable indices, punt.
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if (VariableOperand == -2)
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break;
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// A common case is for the GEP to only do a constant offset. In this case,
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// just add it to the disp field and check validity.
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if (VariableOperand == -1) {
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AddrMode.BaseOffs += ConstantOffset;
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if (ConstantOffset == 0 || TLI.isLegalAddressingMode(AddrMode, AccessTy)){
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// Check to see if we can fold the base pointer in too.
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if (FindMaximalLegalAddressingMode(AddrInst->getOperand(0), AccessTy,
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AddrMode, AddrModeInsts, TLI,
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Depth+1))
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if (MatchAddr(AddrInst->getOperand(0), Depth+1))
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return true;
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}
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AddrMode.BaseOffs -= ConstantOffset;
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} else {
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// Check that this has no base reg yet. If so, we won't have a place to
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// put the base of the GEP (assuming it is not a null ptr).
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bool SetBaseReg = false;
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if (AddrMode.HasBaseReg) {
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if (!isa<ConstantPointerNull>(AddrInst->getOperand(0)))
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break;
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} else {
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AddrMode.HasBaseReg = true;
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AddrMode.BaseReg = AddrInst->getOperand(0);
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SetBaseReg = true;
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}
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// See if the scale amount is valid for this target.
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AddrMode.BaseOffs += ConstantOffset;
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if (TryMatchingScaledValue(AddrInst->getOperand(VariableOperand),
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VariableScale, AccessTy, AddrMode,
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AddrModeInsts, TLI, Depth)) {
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if (!SetBaseReg) return true;
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// If this match succeeded, we know that we can form an address with the
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// GepBase as the basereg. See if we can match *more*.
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AddrMode.HasBaseReg = false;
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AddrMode.BaseReg = 0;
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if (FindMaximalLegalAddressingMode(AddrInst->getOperand(0), AccessTy,
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AddrMode, AddrModeInsts, TLI,
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Depth+1))
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return true;
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// Strange, shouldn't happen. Restore the base reg and succeed the easy
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// way.
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AddrMode.HasBaseReg = true;
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AddrMode.BaseReg = AddrInst->getOperand(0);
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return true;
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}
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AddrMode.BaseOffs -= ConstantOffset;
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if (SetBaseReg) {
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AddrMode.HasBaseReg = false;
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AddrMode.BaseReg = 0;
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}
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return false;
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}
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break;
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// Save the valid addressing mode in case we can't match.
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ExtAddrMode BackupAddrMode = AddrMode;
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// Check that this has no base reg yet. If so, we won't have a place to
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// put the base of the GEP (assuming it is not a null ptr).
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bool SetBaseReg = true;
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if (isa<ConstantPointerNull>(AddrInst->getOperand(0)))
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SetBaseReg = false; // null pointer base doesn't need representation.
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else if (AddrMode.HasBaseReg)
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return false; // Base register already specified, can't match GEP.
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else {
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// Otherwise, we'll use the GEP base as the BaseReg.
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AddrMode.HasBaseReg = true;
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AddrMode.BaseReg = AddrInst->getOperand(0);
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}
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// See if the scale and offset amount is valid for this target.
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AddrMode.BaseOffs += ConstantOffset;
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// FIXME: If VariableScale = 1, just call MatchAddr recursively?
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if (!MatchScaledValue(AddrInst->getOperand(VariableOperand),VariableScale)){
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AddrMode = BackupAddrMode;
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return false;
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}
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// If we have a null as the base of the GEP, folding in the constant offset
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// plus variable scale is all we can do.
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if (!SetBaseReg) return true;
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// If this match succeeded, we know that we can form an address with the
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// GepBase as the basereg. Match the base pointer of the GEP more
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// aggressively by zeroing out BaseReg and rematching. If the base is
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// (for example) another GEP, this allows merging in that other GEP into
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// the addressing mode we're forming.
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AddrMode.HasBaseReg = false;
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AddrMode.BaseReg = 0;
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bool Success = MatchAddr(AddrInst->getOperand(0), Depth+1);
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assert(Success && "MatchAddr should be able to fill in BaseReg!");
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Success=Success;
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return true;
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}
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}
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return false;
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}
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/// FindMaximalLegalAddressingMode - If we can, try to merge the computation of
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/// Addr into the specified addressing mode. If Addr can't be added to AddrMode
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/// this returns false. This assumes that Addr is either a pointer type or
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/// intptr_t for the target.
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/// MatchAddr - If we can, try to add the value of 'Addr' into the current
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/// addressing mode. If Addr can't be added to AddrMode this returns false and
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/// leaves AddrMode unmodified. This assumes that Addr is either a pointer type
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/// or intptr_t for the target.
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///
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/// This method is used to optimize both load/store and inline asms with memory
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/// operands.
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static bool FindMaximalLegalAddressingMode(Value *Addr, const Type *AccessTy,
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ExtAddrMode &AddrMode,
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SmallVectorImpl<Instruction*> &AddrModeInsts,
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const TargetLowering &TLI,
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unsigned Depth) {
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bool AddressingModeMatcher::MatchAddr(Value *Addr, unsigned Depth) {
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if (ConstantInt *CI = dyn_cast<ConstantInt>(Addr)) {
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// Fold in immediates if legal for the target.
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AddrMode.BaseOffs += CI->getSExtValue();
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@ -766,7 +767,7 @@ static bool FindMaximalLegalAddressingMode(Value *Addr, const Type *AccessTy,
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return true;
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AddrMode.BaseOffs -= CI->getSExtValue();
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} else if (GlobalValue *GV = dyn_cast<GlobalValue>(Addr)) {
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// If this is a global variable, fold it into the addressing mode if possible.
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// If this is a global variable, try to fold it into the addressing mode.
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if (AddrMode.BaseGV == 0) {
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AddrMode.BaseGV = GV;
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if (TLI.isLegalAddressingMode(AddrMode, AccessTy))
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@ -774,24 +775,18 @@ static bool FindMaximalLegalAddressingMode(Value *Addr, const Type *AccessTy,
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AddrMode.BaseGV = 0;
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}
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} else if (Instruction *I = dyn_cast<Instruction>(Addr)) {
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if (Depth < 5 && // Limit recursion to avoid exponential behavior.
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FindMaximalLegalAddressingModeForOperation(I, I->getOpcode(),
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AccessTy, AddrMode,
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AddrModeInsts, TLI, Depth)) {
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if (MatchOperationAddr(I, I->getOpcode(), Depth)) {
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AddrModeInsts.push_back(I);
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return true;
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}
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} else if (ConstantExpr *CE = dyn_cast<ConstantExpr>(Addr)) {
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if (Depth < 5 && // Limit recursion to avoid exponential behavior.
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FindMaximalLegalAddressingModeForOperation(CE, CE->getOpcode(),
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AccessTy, AddrMode,
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AddrModeInsts, TLI, Depth))
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if (MatchOperationAddr(CE, CE->getOpcode(), Depth))
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return true;
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} else if (isa<ConstantPointerNull>(Addr)) {
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// Null pointer gets folded without affecting the addressing mode.
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return true;
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}
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// Worse case, the target should support [reg] addressing modes. :)
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if (!AddrMode.HasBaseReg) {
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AddrMode.HasBaseReg = true;
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@ -817,6 +812,10 @@ static bool FindMaximalLegalAddressingMode(Value *Addr, const Type *AccessTy,
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}
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//===----------------------------------------------------------------------===//
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// Memory Optimization
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//===----------------------------------------------------------------------===//
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/// IsNonLocalValue - Return true if the specified values are defined in a
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/// different basic block than BB.
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static bool IsNonLocalValue(Value *V, BasicBlock *BB) {
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@ -825,21 +824,22 @@ static bool IsNonLocalValue(Value *V, BasicBlock *BB) {
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return false;
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}
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/// OptimizeLoadStoreInst - Load and Store Instructions have often have
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/// OptimizeMemoryInst - Load and Store Instructions have often have
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/// addressing modes that can do significant amounts of computation. As such,
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/// instruction selection will try to get the load or store to do as much
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/// computation as possible for the program. The problem is that isel can only
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/// see within a single block. As such, we sink as much legal addressing mode
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/// stuff into the block as possible.
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bool CodeGenPrepare::OptimizeLoadStoreInst(Instruction *LdStInst, Value *Addr,
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const Type *AccessTy,
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DenseMap<Value*,Value*> &SunkAddrs) {
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///
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/// This method is used to optimize both load/store and inline asms with memory
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/// operands.
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bool CodeGenPrepare::OptimizeMemoryInst(Instruction *LdStInst, Value *Addr,
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const Type *AccessTy,
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DenseMap<Value*,Value*> &SunkAddrs) {
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// Figure out what addressing mode will be built up for this operation.
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SmallVector<Instruction*, 16> AddrModeInsts;
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ExtAddrMode AddrMode;
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bool Success = FindMaximalLegalAddressingMode(Addr, AccessTy, AddrMode,
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AddrModeInsts, *TLI, 0);
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Success = Success; assert(Success && "Couldn't select *anything*?");
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ExtAddrMode AddrMode =
|
||||
AddressingModeMatcher::Match(Addr, AccessTy, AddrModeInsts, *TLI);
|
||||
|
||||
// Check to see if any of the instructions supersumed by this addr mode are
|
||||
// non-local to I's BB.
|
||||
@ -940,7 +940,7 @@ bool CodeGenPrepare::OptimizeLoadStoreInst(Instruction *LdStInst, Value *Addr,
|
||||
}
|
||||
|
||||
/// OptimizeInlineAsmInst - If there are any memory operands, use
|
||||
/// OptimizeLoadStoreInt to sink their address computing into the block when
|
||||
/// OptimizeMemoryInst to sink their address computing into the block when
|
||||
/// possible / profitable.
|
||||
bool CodeGenPrepare::OptimizeInlineAsmInst(Instruction *I, CallSite CS,
|
||||
DenseMap<Value*,Value*> &SunkAddrs) {
|
||||
@ -981,8 +981,7 @@ bool CodeGenPrepare::OptimizeInlineAsmInst(Instruction *I, CallSite CS,
|
||||
if (OpInfo.ConstraintType == TargetLowering::C_Memory &&
|
||||
OpInfo.isIndirect) {
|
||||
Value *OpVal = OpInfo.CallOperandVal;
|
||||
MadeChange |= OptimizeLoadStoreInst(I, OpVal, OpVal->getType(),
|
||||
SunkAddrs);
|
||||
MadeChange |= OptimizeMemoryInst(I, OpVal, OpVal->getType(), SunkAddrs);
|
||||
}
|
||||
}
|
||||
|
||||
@ -1111,13 +1110,13 @@ bool CodeGenPrepare::OptimizeBlock(BasicBlock &BB) {
|
||||
MadeChange |= OptimizeCmpExpression(CI);
|
||||
} else if (LoadInst *LI = dyn_cast<LoadInst>(I)) {
|
||||
if (TLI)
|
||||
MadeChange |= OptimizeLoadStoreInst(I, I->getOperand(0), LI->getType(),
|
||||
SunkAddrs);
|
||||
MadeChange |= OptimizeMemoryInst(I, I->getOperand(0), LI->getType(),
|
||||
SunkAddrs);
|
||||
} else if (StoreInst *SI = dyn_cast<StoreInst>(I)) {
|
||||
if (TLI)
|
||||
MadeChange |= OptimizeLoadStoreInst(I, SI->getOperand(1),
|
||||
SI->getOperand(0)->getType(),
|
||||
SunkAddrs);
|
||||
MadeChange |= OptimizeMemoryInst(I, SI->getOperand(1),
|
||||
SI->getOperand(0)->getType(),
|
||||
SunkAddrs);
|
||||
} else if (GetElementPtrInst *GEPI = dyn_cast<GetElementPtrInst>(I)) {
|
||||
if (GEPI->hasAllZeroIndices()) {
|
||||
/// The GEP operand must be a pointer, so must its result -> BitCast
|
||||
|
||||
Loading…
Reference in New Issue
Block a user