diff --git a/lib/CodeGen/InstrSelection/InstrSelectionSupport.cpp b/lib/CodeGen/InstrSelection/InstrSelectionSupport.cpp index 187da269c9c..a5a3662e937 100644 --- a/lib/CodeGen/InstrSelection/InstrSelectionSupport.cpp +++ b/lib/CodeGen/InstrSelection/InstrSelectionSupport.cpp @@ -16,6 +16,7 @@ #include "llvm/Constants.h" #include "llvm/BasicBlock.h" #include "llvm/DerivedTypes.h" +#include "../../Target/Sparc/SparcInstrSelectionSupport.h" using std::vector; //*************************** Local Functions ******************************/ @@ -186,6 +187,12 @@ FixConstantOperandsForInstr(Instruction* vmInstr, immedValue); if (opType == MachineOperand::MO_VirtualRegister) constantThatMustBeLoaded = true; + else { + // The optype has changed from being a register to an immediate + // This means we need to change the opcode, e.g. ADDr -> ADDi + unsigned newOpcode = convertOpcodeFromRegToImm(opCode); + minstr->setOpcode(newOpcode); + } } } else @@ -213,6 +220,13 @@ FixConstantOperandsForInstr(Instruction* vmInstr, ? (Value*)ConstantSInt::get(Type::LongTy, immedValue) : (Value*)ConstantUInt::get(Type::ULongTy,(uint64_t)immedValue); } + else + { + // The optype has changed from being a register to an immediate + // This means we need to change the opcode, e.g. ADDr -> ADDi + unsigned newOpcode = convertOpcodeFromRegToImm(opCode); + minstr->setOpcode(newOpcode); + } } if (opType == MachineOperand::MO_MachineRegister) diff --git a/lib/Target/SparcV9/InstrSelection/InstrSelectionSupport.cpp b/lib/Target/SparcV9/InstrSelection/InstrSelectionSupport.cpp index 187da269c9c..a5a3662e937 100644 --- a/lib/Target/SparcV9/InstrSelection/InstrSelectionSupport.cpp +++ b/lib/Target/SparcV9/InstrSelection/InstrSelectionSupport.cpp @@ -16,6 +16,7 @@ #include "llvm/Constants.h" #include "llvm/BasicBlock.h" #include "llvm/DerivedTypes.h" +#include "../../Target/Sparc/SparcInstrSelectionSupport.h" using std::vector; //*************************** Local Functions ******************************/ @@ -186,6 +187,12 @@ FixConstantOperandsForInstr(Instruction* vmInstr, immedValue); if (opType == MachineOperand::MO_VirtualRegister) constantThatMustBeLoaded = true; + else { + // The optype has changed from being a register to an immediate + // This means we need to change the opcode, e.g. ADDr -> ADDi + unsigned newOpcode = convertOpcodeFromRegToImm(opCode); + minstr->setOpcode(newOpcode); + } } } else @@ -213,6 +220,13 @@ FixConstantOperandsForInstr(Instruction* vmInstr, ? (Value*)ConstantSInt::get(Type::LongTy, immedValue) : (Value*)ConstantUInt::get(Type::ULongTy,(uint64_t)immedValue); } + else + { + // The optype has changed from being a register to an immediate + // This means we need to change the opcode, e.g. ADDr -> ADDi + unsigned newOpcode = convertOpcodeFromRegToImm(opCode); + minstr->setOpcode(newOpcode); + } } if (opType == MachineOperand::MO_MachineRegister)