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[asm parser] Add support for predicating MnemonicAlias based on the assembler
variant/dialect. Addresses a FIXME in the emitMnemonicAliases function. Use and test case to come shortly. rdar://13688439 and part of PR13340. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179804 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chad Rosier
parent
860c08cad5
commit
88eb89b89f
@ -807,6 +807,9 @@ class AsmParserVariant {
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// assembly language.
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int Variant = 0;
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// Name - The AsmParser variant name (e.g., AT&T vs Intel).
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string Name = "";
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// CommentDelimiter - If given, the delimiter string used to recognize
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// comments which are hard coded in the .td assembler strings for individual
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// instructions.
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@ -860,9 +863,16 @@ class TokenAlias<string From, string To> {
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/// def : MnemonicAlias<"pushf", "pushfq">, Requires<[In64BitMode]>;
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/// def : MnemonicAlias<"pushf", "pushfl">, Requires<[In32BitMode]>;
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///
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class MnemonicAlias<string From, string To> {
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/// Mnemonic aliases can also be constrained to specific variants, e.g.:
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///
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/// def : MnemonicAlias<"pushf", "pushfq", "att">, Requires<[In64BitMode]>;
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///
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/// If no variant (e.g., "att" or "intel") is specified then the alias is
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/// applied unconditionally.
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class MnemonicAlias<string From, string To, string VariantName = ""> {
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string FromMnemonic = From;
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string ToMnemonic = To;
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string AsmVariantName = VariantName;
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// Predicates - Predicates that must be true for this remapping to happen.
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list<Predicate> Predicates = [];
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@ -5022,8 +5022,8 @@ static bool isDataTypeToken(StringRef Tok) {
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static bool doesIgnoreDataTypeSuffix(StringRef Mnemonic, StringRef DT) {
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return Mnemonic.startswith("vldm") || Mnemonic.startswith("vstm");
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}
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static void applyMnemonicAliases(StringRef &Mnemonic, unsigned Features);
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static void applyMnemonicAliases(StringRef &Mnemonic, unsigned Features,
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unsigned VariantID);
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/// Parse an arm instruction mnemonic followed by its operands.
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bool ARMAsmParser::ParseInstruction(ParseInstructionInfo &Info, StringRef Name,
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SMLoc NameLoc,
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@ -5034,7 +5034,8 @@ bool ARMAsmParser::ParseInstruction(ParseInstructionInfo &Info, StringRef Name,
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// MatchInstructionImpl(), but that's too late for aliases that include
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// any sort of suffix.
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unsigned AvailableFeatures = getAvailableFeatures();
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applyMnemonicAliases(Name, AvailableFeatures);
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unsigned AssemblerDialect = getParser().getAssemblerDialect();
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applyMnemonicAliases(Name, AvailableFeatures, AssemblerDialect);
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// First check for the ARM-specific .req directive.
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if (Parser.getTok().is(AsmToken::Identifier) &&
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@ -300,6 +300,9 @@ def ATTAsmParser : AsmParser {
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def ATTAsmParserVariant : AsmParserVariant {
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int Variant = 0;
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// Variant name.
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string Name = "att";
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// Discard comments in assembly strings.
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string CommentDelimiter = "#";
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@ -310,6 +313,9 @@ def ATTAsmParserVariant : AsmParserVariant {
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def IntelAsmParserVariant : AsmParserVariant {
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int Variant = 1;
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// Variant name.
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string Name = "intel";
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// Discard comments in assembly strings.
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string CommentDelimiter = ";";
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@ -1833,95 +1833,95 @@ include "X86InstrCompiler.td"
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// Assembler Mnemonic Aliases
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//===----------------------------------------------------------------------===//
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def : MnemonicAlias<"call", "calll">, Requires<[In32BitMode]>;
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def : MnemonicAlias<"call", "callq">, Requires<[In64BitMode]>;
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def : MnemonicAlias<"call", "calll", "att">, Requires<[In32BitMode]>;
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def : MnemonicAlias<"call", "callq", "att">, Requires<[In64BitMode]>;
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def : MnemonicAlias<"cbw", "cbtw">;
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def : MnemonicAlias<"cwde", "cwtl">;
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def : MnemonicAlias<"cwd", "cwtd">;
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def : MnemonicAlias<"cdq", "cltd">;
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def : MnemonicAlias<"cdqe", "cltq">;
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def : MnemonicAlias<"cqo", "cqto">;
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def : MnemonicAlias<"cbw", "cbtw", "att">;
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def : MnemonicAlias<"cwde", "cwtl", "att">;
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def : MnemonicAlias<"cwd", "cwtd", "att">;
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def : MnemonicAlias<"cdq", "cltd", "att">;
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def : MnemonicAlias<"cdqe", "cltq", "att">;
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def : MnemonicAlias<"cqo", "cqto", "att">;
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// lret maps to lretl, it is not ambiguous with lretq.
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def : MnemonicAlias<"lret", "lretl">;
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def : MnemonicAlias<"lret", "lretl", "att">;
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def : MnemonicAlias<"leavel", "leave">, Requires<[In32BitMode]>;
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def : MnemonicAlias<"leaveq", "leave">, Requires<[In64BitMode]>;
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def : MnemonicAlias<"leavel", "leave", "att">, Requires<[In32BitMode]>;
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def : MnemonicAlias<"leaveq", "leave", "att">, Requires<[In64BitMode]>;
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def : MnemonicAlias<"loopz", "loope">;
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def : MnemonicAlias<"loopnz", "loopne">;
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def : MnemonicAlias<"loopz", "loope", "att">;
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def : MnemonicAlias<"loopnz", "loopne", "att">;
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def : MnemonicAlias<"pop", "popl">, Requires<[In32BitMode]>;
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def : MnemonicAlias<"pop", "popq">, Requires<[In64BitMode]>;
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def : MnemonicAlias<"popf", "popfl">, Requires<[In32BitMode]>;
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def : MnemonicAlias<"popf", "popfq">, Requires<[In64BitMode]>;
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def : MnemonicAlias<"popfd", "popfl">;
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def : MnemonicAlias<"pop", "popl", "att">, Requires<[In32BitMode]>;
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def : MnemonicAlias<"pop", "popq", "att">, Requires<[In64BitMode]>;
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def : MnemonicAlias<"popf", "popfl", "att">, Requires<[In32BitMode]>;
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def : MnemonicAlias<"popf", "popfq", "att">, Requires<[In64BitMode]>;
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def : MnemonicAlias<"popfd", "popfl", "att">;
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// FIXME: This is wrong for "push reg". "push %bx" should turn into pushw in
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// all modes. However: "push (addr)" and "push $42" should default to
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// pushl/pushq depending on the current mode. Similar for "pop %bx"
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def : MnemonicAlias<"push", "pushl">, Requires<[In32BitMode]>;
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def : MnemonicAlias<"push", "pushq">, Requires<[In64BitMode]>;
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def : MnemonicAlias<"pushf", "pushfl">, Requires<[In32BitMode]>;
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def : MnemonicAlias<"pushf", "pushfq">, Requires<[In64BitMode]>;
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def : MnemonicAlias<"pushfd", "pushfl">;
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def : MnemonicAlias<"push", "pushl", "att">, Requires<[In32BitMode]>;
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def : MnemonicAlias<"push", "pushq", "att">, Requires<[In64BitMode]>;
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def : MnemonicAlias<"pushf", "pushfl", "att">, Requires<[In32BitMode]>;
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def : MnemonicAlias<"pushf", "pushfq", "att">, Requires<[In64BitMode]>;
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def : MnemonicAlias<"pushfd", "pushfl", "att">;
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def : MnemonicAlias<"repe", "rep">;
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def : MnemonicAlias<"repz", "rep">;
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def : MnemonicAlias<"repnz", "repne">;
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def : MnemonicAlias<"repe", "rep", "att">;
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def : MnemonicAlias<"repz", "rep", "att">;
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def : MnemonicAlias<"repnz", "repne", "att">;
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def : MnemonicAlias<"retl", "ret">, Requires<[In32BitMode]>;
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def : MnemonicAlias<"retq", "ret">, Requires<[In64BitMode]>;
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def : MnemonicAlias<"retl", "ret", "att">, Requires<[In32BitMode]>;
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def : MnemonicAlias<"retq", "ret", "att">, Requires<[In64BitMode]>;
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def : MnemonicAlias<"salb", "shlb">;
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def : MnemonicAlias<"salw", "shlw">;
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def : MnemonicAlias<"sall", "shll">;
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def : MnemonicAlias<"salq", "shlq">;
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def : MnemonicAlias<"salb", "shlb", "att">;
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def : MnemonicAlias<"salw", "shlw", "att">;
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def : MnemonicAlias<"sall", "shll", "att">;
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def : MnemonicAlias<"salq", "shlq", "att">;
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def : MnemonicAlias<"smovb", "movsb">;
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def : MnemonicAlias<"smovw", "movsw">;
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def : MnemonicAlias<"smovl", "movsl">;
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def : MnemonicAlias<"smovq", "movsq">;
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def : MnemonicAlias<"smovb", "movsb", "att">;
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def : MnemonicAlias<"smovw", "movsw", "att">;
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def : MnemonicAlias<"smovl", "movsl", "att">;
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def : MnemonicAlias<"smovq", "movsq", "att">;
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def : MnemonicAlias<"ud2a", "ud2">;
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def : MnemonicAlias<"verrw", "verr">;
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def : MnemonicAlias<"ud2a", "ud2", "att">;
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def : MnemonicAlias<"verrw", "verr", "att">;
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// System instruction aliases.
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def : MnemonicAlias<"iret", "iretl">;
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def : MnemonicAlias<"sysret", "sysretl">;
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def : MnemonicAlias<"sysexit", "sysexitl">;
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def : MnemonicAlias<"iret", "iretl", "att">;
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def : MnemonicAlias<"sysret", "sysretl", "att">;
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def : MnemonicAlias<"sysexit", "sysexitl", "att">;
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def : MnemonicAlias<"lgdtl", "lgdt">, Requires<[In32BitMode]>;
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def : MnemonicAlias<"lgdtq", "lgdt">, Requires<[In64BitMode]>;
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def : MnemonicAlias<"lidtl", "lidt">, Requires<[In32BitMode]>;
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def : MnemonicAlias<"lidtq", "lidt">, Requires<[In64BitMode]>;
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def : MnemonicAlias<"sgdtl", "sgdt">, Requires<[In32BitMode]>;
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def : MnemonicAlias<"sgdtq", "sgdt">, Requires<[In64BitMode]>;
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def : MnemonicAlias<"sidtl", "sidt">, Requires<[In32BitMode]>;
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def : MnemonicAlias<"sidtq", "sidt">, Requires<[In64BitMode]>;
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def : MnemonicAlias<"lgdtl", "lgdt", "att">, Requires<[In32BitMode]>;
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def : MnemonicAlias<"lgdtq", "lgdt", "att">, Requires<[In64BitMode]>;
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def : MnemonicAlias<"lidtl", "lidt", "att">, Requires<[In32BitMode]>;
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def : MnemonicAlias<"lidtq", "lidt", "att">, Requires<[In64BitMode]>;
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def : MnemonicAlias<"sgdtl", "sgdt", "att">, Requires<[In32BitMode]>;
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def : MnemonicAlias<"sgdtq", "sgdt", "att">, Requires<[In64BitMode]>;
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def : MnemonicAlias<"sidtl", "sidt", "att">, Requires<[In32BitMode]>;
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def : MnemonicAlias<"sidtq", "sidt", "att">, Requires<[In64BitMode]>;
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// Floating point stack aliases.
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def : MnemonicAlias<"fcmovz", "fcmove">;
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def : MnemonicAlias<"fcmova", "fcmovnbe">;
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def : MnemonicAlias<"fcmovnae", "fcmovb">;
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def : MnemonicAlias<"fcmovna", "fcmovbe">;
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def : MnemonicAlias<"fcmovae", "fcmovnb">;
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def : MnemonicAlias<"fcomip", "fcompi">;
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def : MnemonicAlias<"fildq", "fildll">;
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def : MnemonicAlias<"fistpq", "fistpll">;
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def : MnemonicAlias<"fisttpq", "fisttpll">;
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def : MnemonicAlias<"fldcww", "fldcw">;
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def : MnemonicAlias<"fnstcww", "fnstcw">;
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def : MnemonicAlias<"fnstsww", "fnstsw">;
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def : MnemonicAlias<"fucomip", "fucompi">;
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def : MnemonicAlias<"fwait", "wait">;
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def : MnemonicAlias<"fcmovz", "fcmove", "att">;
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def : MnemonicAlias<"fcmova", "fcmovnbe", "att">;
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def : MnemonicAlias<"fcmovnae", "fcmovb", "att">;
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def : MnemonicAlias<"fcmovna", "fcmovbe", "att">;
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def : MnemonicAlias<"fcmovae", "fcmovnb", "att">;
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def : MnemonicAlias<"fcomip", "fcompi", "att">;
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def : MnemonicAlias<"fildq", "fildll", "att">;
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def : MnemonicAlias<"fistpq", "fistpll", "att">;
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def : MnemonicAlias<"fisttpq", "fisttpll", "att">;
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def : MnemonicAlias<"fldcww", "fldcw", "att">;
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def : MnemonicAlias<"fnstcww", "fnstcw", "att">;
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def : MnemonicAlias<"fnstsww", "fnstsw", "att">;
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def : MnemonicAlias<"fucomip", "fucompi", "att">;
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def : MnemonicAlias<"fwait", "wait", "att">;
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class CondCodeAlias<string Prefix,string Suffix, string OldCond, string NewCond>
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: MnemonicAlias<!strconcat(Prefix, OldCond, Suffix),
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!strconcat(Prefix, NewCond, Suffix)>;
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!strconcat(Prefix, NewCond, Suffix), "att">;
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/// IntegerCondCodeMnemonicAlias - This multiclass defines a bunch of
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/// MnemonicAlias's that canonicalize the condition code in a mnemonic, for
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@ -2296,29 +2296,25 @@ static std::string GetAliasRequiredFeatures(Record *R,
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return Result;
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}
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/// emitMnemonicAliases - If the target has any MnemonicAlias<> definitions,
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/// emit a function for them and return true, otherwise return false.
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static bool emitMnemonicAliases(raw_ostream &OS, const AsmMatcherInfo &Info) {
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// Ignore aliases when match-prefix is set.
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if (!MatchPrefix.empty())
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return false;
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std::vector<Record*> Aliases =
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Info.getRecords().getAllDerivedDefinitions("MnemonicAlias");
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if (Aliases.empty()) return false;
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OS << "static void applyMnemonicAliases(StringRef &Mnemonic, "
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"unsigned Features) {\n";
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static void emitMnemonicAliasVariant(raw_ostream &OS,const AsmMatcherInfo &Info,
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std::vector<Record*> &Aliases,
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unsigned Indent = 0,
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StringRef AsmParserVariantName = StringRef()){
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// Keep track of all the aliases from a mnemonic. Use an std::map so that the
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// iteration order of the map is stable.
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std::map<std::string, std::vector<Record*> > AliasesFromMnemonic;
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for (unsigned i = 0, e = Aliases.size(); i != e; ++i) {
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Record *R = Aliases[i];
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// FIXME: Allow AssemblerVariantName to be a comma separated list.
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std::string AsmVariantName = R->getValueAsString("AsmVariantName");
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if (AsmVariantName != AsmParserVariantName)
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continue;
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AliasesFromMnemonic[R->getValueAsString("FromMnemonic")].push_back(R);
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}
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if (AliasesFromMnemonic.empty())
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return;
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// Process each alias a "from" mnemonic at a time, building the code executed
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// by the string remapper.
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std::vector<StringMatcher::StringPair> Cases;
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@ -2370,8 +2366,39 @@ static bool emitMnemonicAliases(raw_ostream &OS, const AsmMatcherInfo &Info) {
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Cases.push_back(std::make_pair(I->first, MatchCode));
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}
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StringMatcher("Mnemonic", Cases, OS).Emit(Indent);
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}
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/// emitMnemonicAliases - If the target has any MnemonicAlias<> definitions,
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/// emit a function for them and return true, otherwise return false.
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static bool emitMnemonicAliases(raw_ostream &OS, const AsmMatcherInfo &Info,
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CodeGenTarget &Target) {
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// Ignore aliases when match-prefix is set.
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if (!MatchPrefix.empty())
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return false;
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std::vector<Record*> Aliases =
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Info.getRecords().getAllDerivedDefinitions("MnemonicAlias");
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if (Aliases.empty()) return false;
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OS << "static void applyMnemonicAliases(StringRef &Mnemonic, "
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"unsigned Features, unsigned VariantID) {\n";
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OS << " switch (VariantID) {\n";
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unsigned VariantCount = Target.getAsmParserVariantCount();
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for (unsigned VC = 0; VC != VariantCount; ++VC) {
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Record *AsmVariant = Target.getAsmParserVariant(VC);
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int AsmParserVariantNo = AsmVariant->getValueAsInt("Variant");
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std::string AsmParserVariantName = AsmVariant->getValueAsString("Name");
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OS << " case " << AsmParserVariantNo << ":\n";
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emitMnemonicAliasVariant(OS, Info, Aliases, /*Indent=*/2,
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AsmParserVariantName);
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OS << " break;\n";
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}
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OS << " }\n";
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// Emit aliases that apply to all variants.
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emitMnemonicAliasVariant(OS, Info, Aliases);
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StringMatcher("Mnemonic", Cases, OS).Emit();
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OS << "}\n\n";
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return true;
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@ -2674,7 +2701,7 @@ void AsmMatcherEmitter::run(raw_ostream &OS) {
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OS << "#undef GET_MATCHER_IMPLEMENTATION\n\n";
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// Generate the function that remaps for mnemonic aliases.
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bool HasMnemonicAliases = emitMnemonicAliases(OS, Info);
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bool HasMnemonicAliases = emitMnemonicAliases(OS, Info, Target);
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// Generate the convertToMCInst function to convert operands into an MCInst.
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// Also, generate the convertToMapAndConstraints function for MS-style inline
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@ -2832,9 +2859,7 @@ void AsmMatcherEmitter::run(raw_ostream &OS) {
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if (HasMnemonicAliases) {
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OS << " // Process all MnemonicAliases to remap the mnemonic.\n";
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OS << " // FIXME : Add an entry in AsmParserVariant to check this.\n";
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OS << " if (!VariantID)\n";
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OS << " applyMnemonicAliases(Mnemonic, AvailableFeatures);\n\n";
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OS << " applyMnemonicAliases(Mnemonic, AvailableFeatures, VariantID);\n\n";
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}
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// Emit code to compute the class list for this operand vector.
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