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https://github.com/c64scene-ar/llvm-6502.git
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In this patch we are trying to do two things:
1) If the width of vectorization list candidate is bigger than vector reg width, we will break it down to fit the vector reg. 2) We do not vectorize the width which is not power of two. The performance result shows it will help some spec benchmarks. mesa improved 6.97% and ammp improved 1.54%. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189830 91177308-0d34-0410-b5e6-96231b3b80d8
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@@ -1781,28 +1781,53 @@ bool SLPVectorizer::tryToVectorizeList(ArrayRef<Value *> VL, BoUpSLP &R) {
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// Check that all of the parts are scalar instructions of the same type.
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Instruction *I0 = dyn_cast<Instruction>(VL[0]);
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if (!I0)
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return 0;
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return false;
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unsigned Opcode0 = I0->getOpcode();
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Type *Ty0 = I0->getType();
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unsigned Sz = DL->getTypeSizeInBits(Ty0);
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unsigned VF = MinVecRegSize / Sz;
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for (int i = 0, e = VL.size(); i < e; ++i) {
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Type *Ty = VL[i]->getType();
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if (Ty->isAggregateType() || Ty->isVectorTy())
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return 0;
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return false;
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Instruction *Inst = dyn_cast<Instruction>(VL[i]);
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if (!Inst || Inst->getOpcode() != Opcode0)
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return 0;
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return false;
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}
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R.buildTree(VL);
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int Cost = R.getTreeCost();
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bool Changed = false;
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for (unsigned i = 0, e = VL.size(); i < e; ++i) {
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unsigned OpsWidth = 0;
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if (i + VF > e)
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OpsWidth = e - i;
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else
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OpsWidth = VF;
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if (Cost >= -SLPCostThreshold)
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return false;
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if (!isPowerOf2_32(OpsWidth) || OpsWidth < 2)
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break;
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DEBUG(dbgs() << "SLP: Vectorizing pair at cost:" << Cost << ".\n");
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R.vectorizeTree();
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return true;
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DEBUG(dbgs() << "SLP: Analyzing " << OpsWidth << " operations " << "\n");
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ArrayRef<Value *> Ops = VL.slice(i, OpsWidth);
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R.buildTree(Ops);
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int Cost = R.getTreeCost();
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if (Cost < -SLPCostThreshold) {
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DEBUG(dbgs() << "SLP: Vectorizing pair at cost:" << Cost << ".\n");
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R.vectorizeTree();
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// Move to the next bundle.
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i += VF - 1;
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Changed = true;
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}
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}
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return Changed;
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}
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bool SLPVectorizer::tryToVectorize(BinaryOperator *V, BoUpSLP &R) {
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