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R600/SI: Use same complex patterns for DS atomics
This fixes hitting the same negative base offset problem that was already fixed for regular loads and stores. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217256 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Matt Arsenault
parent
353cf20b9b
commit
89a7e3ec3e
@ -2572,17 +2572,10 @@ def : Pat <
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(EXTRACT_SUBREG $value, sub1), $offset0, $offset1)
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>;
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multiclass DSAtomicRetPat<DS inst, ValueType vt, PatFrag frag> {
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def : Pat <
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(frag (add i32:$ptr, (i32 IMM16bit:$offset)), vt:$value),
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(inst (i1 0), $ptr, $value, (as_i16imm $offset))
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>;
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def : Pat <
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(frag i32:$ptr, vt:$val),
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(inst 0, $ptr, $val, 0)
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>;
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}
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class DSAtomicRetPat<DS inst, ValueType vt, PatFrag frag> : Pat <
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(frag (DS1Addr1Offset i32:$ptr, i32:$offset), vt:$value),
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(inst (i1 0), $ptr, $value, (as_i16imm $offset))
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>;
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// Special case of DSAtomicRetPat for add / sub 1 -> inc / dec
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//
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@ -2594,69 +2587,56 @@ multiclass DSAtomicRetPat<DS inst, ValueType vt, PatFrag frag> {
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// We also load this -1 with s_mov_b32 / s_mov_b64 even though this
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// needs to be a VGPR. The SGPR copy pass will fix this, and it's
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// easier since there is no v_mov_b64.
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multiclass DSAtomicIncRetPat<DS inst, ValueType vt,
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Instruction LoadImm, PatFrag frag> {
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def : Pat <
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(frag (add i32:$ptr, (i32 IMM16bit:$offset)), (vt 1)),
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(inst (i1 0), $ptr, (LoadImm (vt -1)), (as_i16imm $offset))
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>;
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class DSAtomicIncRetPat<DS inst, ValueType vt,
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Instruction LoadImm, PatFrag frag> : Pat <
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(frag (DS1Addr1Offset i32:$ptr, i32:$offset), (vt 1)),
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(inst (i1 0), $ptr, (LoadImm (vt -1)), (as_i16imm $offset))
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>;
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def : Pat <
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(frag i32:$ptr, (vt 1)),
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(inst 0, $ptr, (LoadImm (vt -1)), 0)
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>;
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}
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multiclass DSAtomicCmpXChg <DS inst, ValueType vt, PatFrag frag> {
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def : Pat <
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(frag (add i32:$ptr, (i32 IMM16bit:$offset)), vt:$cmp, vt:$swap),
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(inst (i1 0), $ptr, $cmp, $swap, (as_i16imm $offset))
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>;
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def : Pat <
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(frag i32:$ptr, vt:$cmp, vt:$swap),
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(inst 0, $ptr, $cmp, $swap, 0)
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>;
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}
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class DSAtomicCmpXChg <DS inst, ValueType vt, PatFrag frag> : Pat <
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(frag (DS1Addr1Offset i32:$ptr, i32:$offset), vt:$cmp, vt:$swap),
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(inst (i1 0), $ptr, $cmp, $swap, (as_i16imm $offset))
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>;
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// 32-bit atomics.
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defm : DSAtomicIncRetPat<DS_INC_RTN_U32, i32,
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S_MOV_B32, atomic_load_add_local>;
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defm : DSAtomicIncRetPat<DS_DEC_RTN_U32, i32,
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S_MOV_B32, atomic_load_sub_local>;
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def : DSAtomicIncRetPat<DS_INC_RTN_U32, i32,
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S_MOV_B32, atomic_load_add_local>;
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def : DSAtomicIncRetPat<DS_DEC_RTN_U32, i32,
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S_MOV_B32, atomic_load_sub_local>;
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defm : DSAtomicRetPat<DS_WRXCHG_RTN_B32, i32, atomic_swap_local>;
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defm : DSAtomicRetPat<DS_ADD_RTN_U32, i32, atomic_load_add_local>;
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defm : DSAtomicRetPat<DS_SUB_RTN_U32, i32, atomic_load_sub_local>;
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defm : DSAtomicRetPat<DS_AND_RTN_B32, i32, atomic_load_and_local>;
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defm : DSAtomicRetPat<DS_OR_RTN_B32, i32, atomic_load_or_local>;
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defm : DSAtomicRetPat<DS_XOR_RTN_B32, i32, atomic_load_xor_local>;
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defm : DSAtomicRetPat<DS_MIN_RTN_I32, i32, atomic_load_min_local>;
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defm : DSAtomicRetPat<DS_MAX_RTN_I32, i32, atomic_load_max_local>;
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defm : DSAtomicRetPat<DS_MIN_RTN_U32, i32, atomic_load_umin_local>;
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defm : DSAtomicRetPat<DS_MAX_RTN_U32, i32, atomic_load_umax_local>;
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def : DSAtomicRetPat<DS_WRXCHG_RTN_B32, i32, atomic_swap_local>;
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def : DSAtomicRetPat<DS_ADD_RTN_U32, i32, atomic_load_add_local>;
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def : DSAtomicRetPat<DS_SUB_RTN_U32, i32, atomic_load_sub_local>;
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def : DSAtomicRetPat<DS_AND_RTN_B32, i32, atomic_load_and_local>;
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def : DSAtomicRetPat<DS_OR_RTN_B32, i32, atomic_load_or_local>;
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def : DSAtomicRetPat<DS_XOR_RTN_B32, i32, atomic_load_xor_local>;
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def : DSAtomicRetPat<DS_MIN_RTN_I32, i32, atomic_load_min_local>;
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def : DSAtomicRetPat<DS_MAX_RTN_I32, i32, atomic_load_max_local>;
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def : DSAtomicRetPat<DS_MIN_RTN_U32, i32, atomic_load_umin_local>;
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def : DSAtomicRetPat<DS_MAX_RTN_U32, i32, atomic_load_umax_local>;
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defm : DSAtomicCmpXChg<DS_CMPST_RTN_B32, i32, atomic_cmp_swap_32_local>;
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def : DSAtomicCmpXChg<DS_CMPST_RTN_B32, i32, atomic_cmp_swap_32_local>;
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// 64-bit atomics.
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defm : DSAtomicIncRetPat<DS_INC_RTN_U64, i64,
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S_MOV_B64, atomic_load_add_local>;
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defm : DSAtomicIncRetPat<DS_DEC_RTN_U64, i64,
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S_MOV_B64, atomic_load_sub_local>;
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def : DSAtomicIncRetPat<DS_INC_RTN_U64, i64,
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S_MOV_B64, atomic_load_add_local>;
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def : DSAtomicIncRetPat<DS_DEC_RTN_U64, i64,
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S_MOV_B64, atomic_load_sub_local>;
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defm : DSAtomicRetPat<DS_WRXCHG_RTN_B64, i64, atomic_swap_local>;
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defm : DSAtomicRetPat<DS_ADD_RTN_U64, i64, atomic_load_add_local>;
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defm : DSAtomicRetPat<DS_SUB_RTN_U64, i64, atomic_load_sub_local>;
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defm : DSAtomicRetPat<DS_AND_RTN_B64, i64, atomic_load_and_local>;
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defm : DSAtomicRetPat<DS_OR_RTN_B64, i64, atomic_load_or_local>;
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defm : DSAtomicRetPat<DS_XOR_RTN_B64, i64, atomic_load_xor_local>;
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defm : DSAtomicRetPat<DS_MIN_RTN_I64, i64, atomic_load_min_local>;
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defm : DSAtomicRetPat<DS_MAX_RTN_I64, i64, atomic_load_max_local>;
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defm : DSAtomicRetPat<DS_MIN_RTN_U64, i64, atomic_load_umin_local>;
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defm : DSAtomicRetPat<DS_MAX_RTN_U64, i64, atomic_load_umax_local>;
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def : DSAtomicRetPat<DS_WRXCHG_RTN_B64, i64, atomic_swap_local>;
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def : DSAtomicRetPat<DS_ADD_RTN_U64, i64, atomic_load_add_local>;
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def : DSAtomicRetPat<DS_SUB_RTN_U64, i64, atomic_load_sub_local>;
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def : DSAtomicRetPat<DS_AND_RTN_B64, i64, atomic_load_and_local>;
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def : DSAtomicRetPat<DS_OR_RTN_B64, i64, atomic_load_or_local>;
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def : DSAtomicRetPat<DS_XOR_RTN_B64, i64, atomic_load_xor_local>;
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def : DSAtomicRetPat<DS_MIN_RTN_I64, i64, atomic_load_min_local>;
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def : DSAtomicRetPat<DS_MAX_RTN_I64, i64, atomic_load_max_local>;
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def : DSAtomicRetPat<DS_MIN_RTN_U64, i64, atomic_load_umin_local>;
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def : DSAtomicRetPat<DS_MAX_RTN_U64, i64, atomic_load_umax_local>;
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defm : DSAtomicCmpXChg<DS_CMPST_RTN_B64, i64, atomic_cmp_swap_64_local>;
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def : DSAtomicCmpXChg<DS_CMPST_RTN_B64, i64, atomic_cmp_swap_64_local>;
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//===----------------------------------------------------------------------===//
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@ -1,4 +1,5 @@
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; RUN: llc -march=r600 -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
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; RUN: llc -march=r600 -mcpu=bonaire -verify-machineinstrs < %s | FileCheck -check-prefix=CI -check-prefix=FUNC %s
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; FUNC-LABEL: @lds_atomic_cmpxchg_ret_i32_offset:
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; SI: S_LOAD_DWORD [[PTR:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0xb
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@ -35,3 +36,17 @@ define void @lds_atomic_cmpxchg_ret_i64_offset(i64 addrspace(1)* %out, i64 addrs
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store i64 %result, i64 addrspace(1)* %out, align 8
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ret void
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}
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; FUNC-LABEL: @lds_atomic_cmpxchg_ret_i32_bad_si_offset
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; SI: DS_CMPST_RTN_B32 v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}}, 0x0
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; CI: DS_CMPST_RTN_B32 v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}}, 0x10
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; SI: S_ENDPGM
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define void @lds_atomic_cmpxchg_ret_i32_bad_si_offset(i32 addrspace(1)* %out, i32 addrspace(3)* %ptr, i32 %swap, i32 %a, i32 %b) nounwind {
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%sub = sub i32 %a, %b
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%add = add i32 %sub, 4
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%gep = getelementptr i32 addrspace(3)* %ptr, i32 %add
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%pair = cmpxchg i32 addrspace(3)* %gep, i32 7, i32 %swap seq_cst monotonic
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%result = extractvalue { i32, i1 } %pair, 0
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store i32 %result, i32 addrspace(1)* %out, align 4
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ret void
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}
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@ -1,4 +1,5 @@
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; RUN: llc -march=r600 -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s
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; RUN: llc -march=r600 -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
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; RUN: llc -march=r600 -mcpu=bonaire -verify-machineinstrs < %s | FileCheck -check-prefix=CI -check-prefix=FUNC %s
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; FUNC-LABEL: @lds_atomic_xchg_ret_i32:
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; SI: S_LOAD_DWORD [[SPTR:s[0-9]+]],
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@ -47,6 +48,19 @@ define void @lds_atomic_add_ret_i32_offset(i32 addrspace(1)* %out, i32 addrspace
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ret void
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}
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; FUNC-LABEL: @lds_atomic_add_ret_i32_bad_si_offset
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; SI: DS_ADD_RTN_U32 v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}}, 0x0
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; CI: DS_ADD_RTN_U32 v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}}, 0x10
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; SI: S_ENDPGM
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define void @lds_atomic_add_ret_i32_bad_si_offset(i32 addrspace(1)* %out, i32 addrspace(3)* %ptr, i32 %a, i32 %b) nounwind {
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%sub = sub i32 %a, %b
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%add = add i32 %sub, 4
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%gep = getelementptr i32 addrspace(3)* %ptr, i32 %add
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%result = atomicrmw add i32 addrspace(3)* %gep, i32 4 seq_cst
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store i32 %result, i32 addrspace(1)* %out, align 4
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ret void
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}
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; FUNC-LABEL: @lds_atomic_inc_ret_i32:
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; SI: S_MOV_B32 [[SNEGONE:s[0-9]+]], -1
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; SI: V_MOV_B32_e32 [[NEGONE:v[0-9]+]], [[SNEGONE]]
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@ -70,6 +84,19 @@ define void @lds_atomic_inc_ret_i32_offset(i32 addrspace(1)* %out, i32 addrspace
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ret void
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}
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; FUNC-LABEL: @lds_atomic_inc_ret_i32_bad_si_offset:
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; SI: DS_INC_RTN_U32 v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}}, 0x0
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; CI: DS_INC_RTN_U32 v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}}, 0x10
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; SI: S_ENDPGM
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define void @lds_atomic_inc_ret_i32_bad_si_offset(i32 addrspace(1)* %out, i32 addrspace(3)* %ptr, i32 %a, i32 %b) nounwind {
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%sub = sub i32 %a, %b
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%add = add i32 %sub, 4
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%gep = getelementptr i32 addrspace(3)* %ptr, i32 %add
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%result = atomicrmw add i32 addrspace(3)* %gep, i32 1 seq_cst
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store i32 %result, i32 addrspace(1)* %out, align 4
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ret void
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}
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; FUNC-LABEL: @lds_atomic_sub_ret_i32:
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; SI: DS_SUB_RTN_U32
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; SI: S_ENDPGM
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