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Add support for the 'x' constraint.

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Part of rdar://9307836 and rdar://9119939


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134215 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Eric Christopher
2011-07-01 00:14:47 +00:00
parent c3882164cb
commit 89bd71fc53
2 changed files with 19 additions and 0 deletions
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9
lib/Target/ARM/ARMISelLowering.cpp
View File

@ -7483,6 +7483,7 @@ ARMTargetLowering::getConstraintType(const std::string &Constraint) const {
case 'l': return C_RegisterClass; case 'l': return C_RegisterClass;
case 'w': return C_RegisterClass; case 'w': return C_RegisterClass;
case 'h': return C_RegisterClass; case 'h': return C_RegisterClass;
case 'x': return C_RegisterClass;
} }
} else if (Constraint.size() == 2) { } else if (Constraint.size() == 2) {
switch (Constraint[0]) { switch (Constraint[0]) {
@ -7555,6 +7556,14 @@ ARMTargetLowering::getRegForInlineAsmConstraint(const std::string &Constraint,
if (VT.getSizeInBits() == 128) if (VT.getSizeInBits() == 128)
return RCPair(0U, ARM::QPRRegisterClass); return RCPair(0U, ARM::QPRRegisterClass);
break; break;
case 'x':
if (VT == MVT::f32)
return RCPair(0U, ARM::SPR_8RegisterClass);
if (VT.getSizeInBits() == 64)
return RCPair(0U, ARM::DPR_8RegisterClass);
if (VT.getSizeInBits() == 128)
return RCPair(0U, ARM::QPR_8RegisterClass);
break;
} }
} }
if (StringRef("{cc}").equals_lower(Constraint)) if (StringRef("{cc}").equals_lower(Constraint))

10
test/CodeGen/ARM/inlineasm3.ll
View File

@ -58,3 +58,13 @@ entry:
call void asm sideeffect "flds s15, $0 \0A", "*^Uvm,~{s15}"(float* @k.2126) nounwind call void asm sideeffect "flds s15, $0 \0A", "*^Uvm,~{s15}"(float* @k.2126) nounwind
ret i32 0 ret i32 0
} }
; Radar 9307836 & 9119939
define float @t6(float %y) nounwind {
entry:
; CHECK: t6
; CHECK: flds s15, s0
%0 = tail call float asm "flds s15, $0", "=x"() nounwind
ret float %0
}