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Use add32ri8 and friends on fast isel.
This fixes pr22854. The core issue on the bug is that there are multiple instructions that print the same in assembly. In fact, there doesn't seem to be any syntax for specifying that a constant that fits in 8 bits should use a 32 bit immediate. The attached patch changes fast isel to consider i16immSExt8, i32immSExt8, and i64immSExt8. They were disabled because fastisel didn’t know to call the predicate back in the day. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232223 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -855,11 +855,11 @@ def X86_COND_E_OR_NE : ImmLeaf<i8, [{
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return (Imm == X86::COND_E) || (Imm == X86::COND_NE);
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}]>;
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let FastIselShouldIgnore = 1 in { // FastIsel should ignore all simm8 instrs.
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def i16immSExt8 : ImmLeaf<i16, [{ return Imm == (int8_t)Imm; }]>;
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def i32immSExt8 : ImmLeaf<i32, [{ return Imm == (int8_t)Imm; }]>;
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def i64immSExt8 : ImmLeaf<i64, [{ return Imm == (int8_t)Imm; }]>;
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}
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def i16immSExt8 : ImmLeaf<i16, [{ return Imm == (int8_t)Imm; }]>;
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def i32immSExt8 : ImmLeaf<i32, [{ return Imm == (int8_t)Imm; }]>;
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def i64immSExt8 : ImmLeaf<i64, [{ return Imm == (int8_t)Imm; }]>;
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def i64immSExt32 : ImmLeaf<i64, [{ return Imm == (int32_t)Imm; }]>;
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10
test/CodeGen/X86/add32ri8.ll
Normal file
10
test/CodeGen/X86/add32ri8.ll
Normal file
@ -0,0 +1,10 @@
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; RUN: llc -mtriple=x86_64-linux -fast-isel -show-mc-encoding < %s | FileCheck %s
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; pr22854
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; CHECK: addl $42, %esi # encoding: [0x83,0xc6,0x2a]
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define void @foo(i32 *%s, i32 %x) {
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%y = add nsw i32 %x, 42
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store i32 %y, i32* %s, align 4
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ret void
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}
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@ -25,7 +25,7 @@
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; if they've changed due to a bugfix, change in register allocation, etc.
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; CHECK: [[A]]: Beginning address index: 2
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; CHECK-NEXT: Length: 190
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; CHECK-NEXT: Length: 179
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; CHECK-NEXT: Location description: 11 00
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; CHECK-NEXT: {{^$}}
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; CHECK-NEXT: Beginning address index: 3
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