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Fix PR4466 by making fastisel set operand flags correctly.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74366 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner 2009-06-27 01:31:51 +00:00
parent 5b93ea1ca3
commit 89da699092
2 changed files with 14 additions and 7 deletions
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17
lib/Target/X86/X86FastISel.cpp
View File

@ -1493,15 +1493,22 @@ unsigned X86FastISel::TargetMaterializeConstant(Constant *C) {
// x86-32 PIC requires a PIC base register for constant pools.
unsigned PICBase = 0;
if (TM.getRelocationModel() == Reloc::PIC_ &&
!Subtarget->is64Bit())
PICBase = getInstrInfo()->getGlobalBaseReg(&MF);
unsigned char OpFlag = 0;
if (TM.getRelocationModel() == Reloc::PIC_) {
if (Subtarget->isPICStyleStub()) {
OpFlag = X86II::MO_PIC_BASE_OFFSET;
PICBase = getInstrInfo()->getGlobalBaseReg(&MF);
} else if (Subtarget->isPICStyleGOT()) {
OpFlag = X86II::MO_GOTOFF;
PICBase = getInstrInfo()->getGlobalBaseReg(&MF);
}
}
// Create the load from the constant pool.
unsigned MCPOffset = MCP.getConstantPoolIndex(C, Align);
unsigned ResultReg = createResultReg(RC);
addConstantPoolReference(BuildMI(MBB, DL, TII.get(Opc), ResultReg), MCPOffset,
PICBase);
addConstantPoolReference(BuildMI(MBB, DL, TII.get(Opc), ResultReg),
MCPOffset, PICBase, OpFlag);
return ResultReg;
}

4
lib/Target/X86/X86InstrBuilder.h
View File

@ -157,10 +157,10 @@ addFrameReference(const MachineInstrBuilder &MIB, int FI, int Offset = 0) {
///
inline const MachineInstrBuilder &
addConstantPoolReference(const MachineInstrBuilder &MIB, unsigned CPI,
unsigned GlobalBaseReg = 0) {
unsigned GlobalBaseReg, unsigned char OpFlags) {
//FIXME: factor this
return MIB.addReg(GlobalBaseReg).addImm(1).addReg(0)
.addConstantPoolIndex(CPI).addReg(0);
.addConstantPoolIndex(CPI, 0, OpFlags).addReg(0);
}
} // End llvm namespace