6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2024-12-13 04:30:23 +00:00
Code Issues Projects Releases Wiki Activity

Be nice to Xcore and the XMOS assembler and avoid quoting section names

Browse Source 
that contain only letters, digits and the characters "_" and ".".


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127028 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Joerg Sonnenberger 2011-03-04 20:03:14 +00:00
parent ca8a2aa921
commit 89e0f386f3
17 changed files with 54 additions and 48 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

30
lib/MC/MCSectionELF.cpp
View File

@ -40,20 +40,26 @@ void MCSectionELF::PrintSwitchToSection(const MCAsmInfo &MAI,
} }
StringRef name = getSectionName(); StringRef name = getSectionName();
OS << "\t.section\t\""; if (name.find_first_not_of("0123456789_."
for (const char *b = name.begin(), *e = name.end(); b < e; ++b) { "abcdefghijklmnopqrstuvwxyz"
if (*b == '"') // Unquoted " "ABCDEFGHIJKLMNOPQRSTUVWXYZ") == name.npos) {
OS << "\\\""; OS << "\t.section\t" << name;
else if (*b != '\\') // Neither " or backslash } else {
OS << *b; OS << "\t.section\t\"";
else if (b + 1 == e) // Trailing backslash for (const char *b = name.begin(), *e = name.end(); b < e; ++b) {
OS << "\\\\"; if (*b == '"') // Unquoted "
else { OS << "\\\"";
OS << b[0] << b[1]; // Quoted character else if (*b != '\\') // Neither " or backslash
++b; OS << *b;
else if (b + 1 == e) // Trailing backslash
OS << "\\\\";
else {
OS << b[0] << b[1]; // Quoted character
++b;
}
} }
OS << '"';
} }
OS << '"';
// Handle the weird solaris syntax if desired. // Handle the weird solaris syntax if desired.
if (MAI.usesSunStyleELFSectionSwitchSyntax() && if (MAI.usesSunStyleELFSectionSwitchSyntax() &&

8
test/CodeGen/ARM/ctors_dtors.ll
View File

@ -5,11 +5,11 @@
; DARWIN: .section __DATA,__mod_init_func,mod_init_funcs ; DARWIN: .section __DATA,__mod_init_func,mod_init_funcs
; DARWIN: .section __DATA,__mod_term_func,mod_term_funcs ; DARWIN: .section __DATA,__mod_term_func,mod_term_funcs
; ELF: .section ".ctors","aw",%progbits ; ELF: .section .ctors,"aw",%progbits
; ELF: .section ".dtors","aw",%progbits ; ELF: .section .dtors,"aw",%progbits
; GNUEABI: .section ".init_array","aw",%init_array ; GNUEABI: .section .init_array,"aw",%init_array
; GNUEABI: .section ".fini_array","aw",%fini_array ; GNUEABI: .section .fini_array,"aw",%fini_array
@llvm.global_ctors = appending global [1 x { i32, void ()* }] [ { i32, void ()* } { i32 65535, void ()* @__mf_init } ] ; <[1 x { i32, void ()* }]*> [#uses=0] @llvm.global_ctors = appending global [1 x { i32, void ()* }] [ { i32, void ()* } { i32 65535, void ()* @__mf_init } ] ; <[1 x { i32, void ()* }]*> [#uses=0]
@llvm.global_dtors = appending global [1 x { i32, void ()* }] [ { i32, void ()* } { i32 65535, void ()* @__mf_fini } ] ; <[1 x { i32, void ()* }]*> [#uses=0] @llvm.global_dtors = appending global [1 x { i32, void ()* }] [ { i32, void ()* } { i32 65535, void ()* @__mf_fini } ] ; <[1 x { i32, void ()* }]*> [#uses=0]

2
test/CodeGen/ARM/section.ll
View File

@ -1,7 +1,7 @@
; RUN: llc < %s -mtriple=arm-linux | \ ; RUN: llc < %s -mtriple=arm-linux | \
; RUN: grep {__DTOR_END__:} ; RUN: grep {__DTOR_END__:}
; RUN: llc < %s -mtriple=arm-linux | \ ; RUN: llc < %s -mtriple=arm-linux | \
; RUN: grep {\\.section."\\.dtors","aw",.progbits} ; RUN: grep {\\.section.\\.dtors,"aw",.progbits}
@__DTOR_END__ = internal global [1 x i32] zeroinitializer, section ".dtors" ; <[1 x i32]*> [#uses=0] @__DTOR_END__ = internal global [1 x i32] zeroinitializer, section ".dtors" ; <[1 x i32]*> [#uses=0]

2
test/CodeGen/Blackfin/jumptable.ll
View File

@ -1,6 +1,6 @@
; RUN: llc < %s -march=bfin -verify-machineinstrs | FileCheck %s ; RUN: llc < %s -march=bfin -verify-machineinstrs | FileCheck %s
; CHECK: .section ".rodata" ; CHECK: .section .rodata
; CHECK: JTI0_0: ; CHECK: JTI0_0:
; CHECK: .long .BB0_1 ; CHECK: .long .BB0_1

2
test/CodeGen/CellSPU/bss.ll
View File

@ -1,7 +1,7 @@
; RUN: llc < %s -march=cellspu | FileCheck %s ; RUN: llc < %s -march=cellspu | FileCheck %s
@bssVar = global i32 zeroinitializer @bssVar = global i32 zeroinitializer
; CHECK: .section ".bss" ; CHECK: .section .bss
; CHECK-NEXT: .globl ; CHECK-NEXT: .globl
@localVar= internal global i32 zeroinitializer @localVar= internal global i32 zeroinitializer

4
test/CodeGen/Mips/2008-07-15-InternalConstant.ll
View File

@ -1,6 +1,6 @@
; RUN: llc < %s -march=mips -o %t ; RUN: llc < %s -march=mips -o %t
; RUN: grep {rodata.str1.4","aMS",@progbits} %t | count 1 ; RUN: grep {rodata.str1.4,"aMS",@progbits} %t | count 1
; RUN: grep {r.data",} %t | count 1 ; RUN: grep {r.data,} %t | count 1
; RUN: grep {\%hi} %t | count 2 ; RUN: grep {\%hi} %t | count 2
; RUN: grep {\%lo} %t | count 2 ; RUN: grep {\%lo} %t | count 2
; RUN: not grep {gp_rel} %t ; RUN: not grep {gp_rel} %t

2
test/CodeGen/Mips/2008-07-22-Cstpool.ll
View File

@ -1,6 +1,6 @@
; RUN: llc < %s -march=mips -o %t ; RUN: llc < %s -march=mips -o %t
; RUN: grep {CPI\[01\]_\[01\]:} %t | count 2 ; RUN: grep {CPI\[01\]_\[01\]:} %t | count 2
; RUN: grep {".rodata.cst4","aM",@progbits} %t | count 1 ; RUN: grep {.rodata.cst4,"aM",@progbits} %t | count 1
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-i64:32:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64" target datalayout = "e-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-i64:32:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64"
target triple = "mipsallegrexel-unknown-psp-elf" target triple = "mipsallegrexel-unknown-psp-elf"

2
test/CodeGen/PowerPC/sections.ll
View File

@ -3,6 +3,6 @@
@A = global i32 0 @A = global i32 0
; CHECK: .section ".bss","aw",@nobits ; CHECK: .section .bss,"aw",@nobits
; CHECK: .globl A ; CHECK: .globl A

6
test/CodeGen/X86/attribute-sections.ll
View File

@ -3,16 +3,16 @@
declare i32 @foo() declare i32 @foo()
@G0 = global i32 ()* @foo, section ".init_array" @G0 = global i32 ()* @foo, section ".init_array"
; LINUX: .section ".init_array","aw" ; LINUX: .section .init_array,"aw"
; LINUX: .globl G0 ; LINUX: .globl G0
@G1 = global i32 ()* @foo, section ".fini_array" @G1 = global i32 ()* @foo, section ".fini_array"
; LINUX: .section ".fini_array","aw" ; LINUX: .section .fini_array,"aw"
; LINUX: .globl G1 ; LINUX: .globl G1
@G2 = global i32 ()* @foo, section ".preinit_array" @G2 = global i32 ()* @foo, section ".preinit_array"
; LINUX: .section ".preinit_array","aw" ; LINUX: .section .preinit_array,"aw"
; LINUX: .globl G2 ; LINUX: .globl G2

2
test/CodeGen/X86/bss_pagealigned.ll
View File

@ -14,7 +14,7 @@ define void @unxlate_dev_mem_ptr(i64 %phis, i8* %addr) nounwind {
ret void ret void
} }
@bm_pte = internal global [512 x %struct.kmem_cache_order_objects] zeroinitializer, section ".bss.page_aligned", align 4096 @bm_pte = internal global [512 x %struct.kmem_cache_order_objects] zeroinitializer, section ".bss.page_aligned", align 4096
; CHECK: .section ".bss.page_aligned","aw",@nobits ; CHECK: .section .bss.page_aligned,"aw",@nobits
; CHECK-NEXT: .align 4096 ; CHECK-NEXT: .align 4096
; CHECK-NEXT: bm_pte: ; CHECK-NEXT: bm_pte:
; CHECK-NEXT: .zero 4096 ; CHECK-NEXT: .zero 4096

2
test/CodeGen/X86/global-sections-tls.ll
View File

@ -2,7 +2,7 @@
; PR4639 ; PR4639
@G1 = internal thread_local global i32 0 ; <i32*> [#uses=1] @G1 = internal thread_local global i32 0 ; <i32*> [#uses=1]
; LINUX: .section ".tbss","awT",@nobits ; LINUX: .section .tbss,"awT",@nobits
; LINUX: G1: ; LINUX: G1:

16
test/CodeGen/X86/global-sections.ll
View File

@ -33,10 +33,10 @@
; DARWIN: _G3: ; DARWIN: _G3:
; DARWIN: .long _G1 ; DARWIN: .long _G1
; LINUX: .section ".rodata","a",@progbits ; LINUX: .section .rodata,"a",@progbits
; LINUX: .globl G3 ; LINUX: .globl G3
; LINUX-SECTIONS: .section ".rodata.G3","a",@progbits ; LINUX-SECTIONS: .section .rodata.G3,"a",@progbits
; LINUX-SECTIONS: .globl G3 ; LINUX-SECTIONS: .globl G3
@ -66,7 +66,7 @@
@"foo bar" = linkonce global i32 42 @"foo bar" = linkonce global i32 42
; LINUX: .type foo_20_bar,@object ; LINUX: .type foo_20_bar,@object
; LINUX: .section ".data.foo_20_bar","aGw",@progbits,foo_20_bar,comdat ; LINUX: .section .data.foo_20_bar,"aGw",@progbits,foo_20_bar,comdat
; LINUX: .weak foo_20_bar ; LINUX: .weak foo_20_bar
; LINUX: foo_20_bar: ; LINUX: foo_20_bar:
@ -79,7 +79,7 @@
@G6 = weak_odr unnamed_addr constant [1 x i8] c"\01" @G6 = weak_odr unnamed_addr constant [1 x i8] c"\01"
; LINUX: .type G6,@object ; LINUX: .type G6,@object
; LINUX: .section ".rodata.G6","aG",@progbits,G6,comdat ; LINUX: .section .rodata.G6,"aG",@progbits,G6,comdat
; LINUX: .weak G6 ; LINUX: .weak G6
; LINUX: G6: ; LINUX: G6:
; LINUX: .byte 1 ; LINUX: .byte 1
@ -99,12 +99,12 @@
; DARWIN: _G7: ; DARWIN: _G7:
; DARWIN: .asciz "abcdefghi" ; DARWIN: .asciz "abcdefghi"
; LINUX: .section ".rodata.str1.1","aMS",@progbits,1 ; LINUX: .section .rodata.str1.1,"aMS",@progbits,1
; LINUX: .globl G7 ; LINUX: .globl G7
; LINUX: G7: ; LINUX: G7:
; LINUX: .asciz "abcdefghi" ; LINUX: .asciz "abcdefghi"
; LINUX-SECTIONS: .section ".rodata.G7","aMS",@progbits,1 ; LINUX-SECTIONS: .section .rodata.G7,"aMS",@progbits,1
; LINUX-SECTIONS: .globl G7 ; LINUX-SECTIONS: .globl G7
@ -114,7 +114,7 @@
; DARWIN: .globl _G8 ; DARWIN: .globl _G8
; DARWIN: _G8: ; DARWIN: _G8:
; LINUX: .section ".rodata.str2.2","aMS",@progbits,2 ; LINUX: .section .rodata.str2.2,"aMS",@progbits,2
; LINUX: .globl G8 ; LINUX: .globl G8
; LINUX:G8: ; LINUX:G8:
@ -123,7 +123,7 @@
; DARWIN: .globl _G9 ; DARWIN: .globl _G9
; DARWIN: _G9: ; DARWIN: _G9:
; LINUX: .section ".rodata.str4.4","aMS",@progbits,4 ; LINUX: .section .rodata.str4.4,"aMS",@progbits,4
; LINUX: .globl G9 ; LINUX: .globl G9
; LINUX:G9 ; LINUX:G9

2
test/CodeGen/X86/pic_jumptable.ll
View File

@ -1,4 +1,4 @@
; RUN: llc < %s -relocation-model=pic -mtriple=i386-linux-gnu -asm-verbose=false | grep -F .text._Z3fooILi1EEvi","axG",@progbits,_Z3fooILi1EEvi,comdat ; RUN: llc < %s -relocation-model=pic -mtriple=i386-linux-gnu -asm-verbose=false | grep -F .text._Z3fooILi1EEvi,"axG",@progbits,_Z3fooILi1EEvi,comdat
; RUN: llc < %s -relocation-model=pic -mtriple=i686-apple-darwin -asm-verbose=false | FileCheck %s ; RUN: llc < %s -relocation-model=pic -mtriple=i686-apple-darwin -asm-verbose=false | FileCheck %s
; RUN: llc < %s -mtriple=x86_64-apple-darwin | not grep 'lJTI' ; RUN: llc < %s -mtriple=x86_64-apple-darwin | not grep 'lJTI'
; rdar://6971437 ; rdar://6971437

2
test/CodeGen/XCore/constants.ll
View File

@ -1,6 +1,6 @@
; RUN: llc < %s -march=xcore -mcpu=xs1b-generic | FileCheck %s ; RUN: llc < %s -march=xcore -mcpu=xs1b-generic | FileCheck %s
; CHECK: .section ".cp.rodata.cst4","aMc",@progbits,4 ; CHECK: .section .cp.rodata.cst4,"aMc",@progbits,4
; CHECK: .LCPI0_0: ; CHECK: .LCPI0_0:
; CHECK: .long 12345678 ; CHECK: .long 12345678
; CHECK: f: ; CHECK: f:

16
test/CodeGen/XCore/globals.ll
View File

@ -60,33 +60,33 @@ entry:
} }
@G1 = global i32 4712 @G1 = global i32 4712
; CHECK: .section ".dp.data","awd",@progbits ; CHECK: .section .dp.data,"awd",@progbits
; CHECK: G1: ; CHECK: G1:
@G2 = global i32 0 @G2 = global i32 0
; CHECK: .section ".dp.bss","awd",@nobits ; CHECK: .section .dp.bss,"awd",@nobits
; CHECK: G2: ; CHECK: G2:
@G3 = unnamed_addr constant i32 9401 @G3 = unnamed_addr constant i32 9401
; CHECK: .section ".cp.rodata.cst4","aMc",@progbits,4 ; CHECK: .section .cp.rodata.cst4,"aMc",@progbits,4
; CHECK: G3: ; CHECK: G3:
@G4 = global i32* @G1 @G4 = global i32* @G1
; CHECK: .section ".dp.data","awd",@progbits ; CHECK: .section .dp.data,"awd",@progbits
; CHECK: G4: ; CHECK: G4:
@G5 = unnamed_addr constant i32* @G1 @G5 = unnamed_addr constant i32* @G1
; CHECK: .section ".cp.rodata","ac",@progbits ; CHECK: .section .cp.rodata,"ac",@progbits
; CHECK: G5: ; CHECK: G5:
@G6 = global i32* @G8 @G6 = global i32* @G8
; CHECK: .section ".dp.data","awd",@progbits ; CHECK: .section .dp.data,"awd",@progbits
; CHECK: G6: ; CHECK: G6:
@G7 = unnamed_addr constant i32* @G8 @G7 = unnamed_addr constant i32* @G8
; CHECK: .section ".cp.rodata","ac",@progbits ; CHECK: .section .cp.rodata,"ac",@progbits
; CHECK: G7: ; CHECK: G7:
@G8 = internal global i32 9312 @G8 = internal global i32 9312
; CHECK: .section ".dp.data","awd",@progbits ; CHECK: .section .dp.data,"awd",@progbits
; CHECK: G8: ; CHECK: G8:

2
test/CodeGen/XCore/tls.ll
View File

@ -8,7 +8,7 @@ entry:
} }
@G = thread_local global i32 15 @G = thread_local global i32 15
; CHECK: .section ".dp.data","awd",@progbits ; CHECK: .section .dp.data,"awd",@progbits
; CHECK: G: ; CHECK: G:
; CHECK: .long 15 ; CHECK: .long 15
; CHECK: .long 15 ; CHECK: .long 15

2
test/MC/ELF/section-quoting.s
View File

@ -6,5 +6,5 @@
.section "foo bar" .section "foo bar"
// CHECK: .section "bar-\"foo\"" // CHECK: .section "bar-\"foo\""
// CHECK: .section "foo" // CHECK: .section foo
// CHECK: .section "foo bar" // CHECK: .section "foo bar"