Make DwarfExpression use the new DIExpressionIterator. NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226748 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Adrian Prantl
2015-01-22 00:00:59 +00:00
parent f51d86f02c
commit 8a1465afce
2 changed files with 36 additions and 30 deletions

View File

@@ -200,55 +200,62 @@ static unsigned getOffsetOrZero(unsigned OffsetInBits,
bool DwarfExpression::AddMachineRegExpression(DIExpression Expr, bool DwarfExpression::AddMachineRegExpression(DIExpression Expr,
unsigned MachineReg, unsigned MachineReg,
unsigned PieceOffsetInBits) { unsigned PieceOffsetInBits) {
unsigned N = Expr.getNumElements(); auto I = Expr.begin();
unsigned I = 0;
bool ValidReg = false;
// Pattern-match combinations for which more efficient representations exist // Pattern-match combinations for which more efficient representations exist
// first. // first.
if (N >= 3 && Expr.getElement(0) == dwarf::DW_OP_piece) { if (I == Expr.end())
return AddMachineRegPiece(MachineReg);
bool ValidReg = false;
switch (*I) {
case dwarf::DW_OP_piece: {
unsigned SizeOfByte = 8; unsigned SizeOfByte = 8;
unsigned OffsetInBits = Expr.getElement(1) * SizeOfByte; unsigned OffsetInBits = I.getArg(1) * SizeOfByte;
unsigned SizeInBits = Expr.getElement(2) * SizeOfByte; unsigned SizeInBits = I.getArg(2) * SizeOfByte;
ValidReg = // Piece always comes at the end of the expression.
AddMachineRegPiece(MachineReg, SizeInBits, return AddMachineRegPiece(MachineReg, SizeInBits,
getOffsetOrZero(OffsetInBits, PieceOffsetInBits)); getOffsetOrZero(OffsetInBits, PieceOffsetInBits));
I = 3; }
} else if (N >= 3 && Expr.getElement(0) == dwarf::DW_OP_plus && case dwarf::DW_OP_plus:
Expr.getElement(2) == dwarf::DW_OP_deref) {
// [DW_OP_reg,Offset,DW_OP_plus,DW_OP_deref] --> [DW_OP_breg,Offset]. // [DW_OP_reg,Offset,DW_OP_plus,DW_OP_deref] --> [DW_OP_breg,Offset].
unsigned Offset = Expr.getElement(1); if (*std::next(I) == dwarf::DW_OP_deref) {
unsigned Offset = I.getArg(1);
ValidReg = AddMachineRegIndirect(MachineReg, Offset); ValidReg = AddMachineRegIndirect(MachineReg, Offset);
I = 3; std::advance(I, 2);
} else if (N >= 1 && Expr.getElement(0) == dwarf::DW_OP_deref) { break;
// [DW_OP_reg,DW_OP_deref] --> [DW_OP_breg].
ValidReg = AddMachineRegIndirect(MachineReg);
I = 1;
} else } else
ValidReg = AddMachineRegPiece(MachineReg); ValidReg = AddMachineRegPiece(MachineReg);
case dwarf::DW_OP_deref:
// [DW_OP_reg,DW_OP_deref] --> [DW_OP_breg].
ValidReg = AddMachineRegIndirect(MachineReg);
++I;
break;
default:
llvm_unreachable("unsupported operand");
}
if (!ValidReg) if (!ValidReg)
return false; return false;
// Emit remaining elements of the expression. // Emit remaining elements of the expression.
AddExpression(Expr, I); AddExpression(I, PieceOffsetInBits);
return true; return true;
} }
void DwarfExpression::AddExpression(DIExpression Expr, unsigned I, void DwarfExpression::AddExpression(DIExpressionIterator I,
unsigned PieceOffsetInBits) { unsigned PieceOffsetInBits) {
unsigned N = Expr.getNumElements(); for (; I != DIExpressionIterator(); ++I) {
for (; I < N; ++I) { switch (*I) {
switch (Expr.getElement(I)) {
case dwarf::DW_OP_piece: { case dwarf::DW_OP_piece: {
unsigned SizeOfByte = 8; unsigned SizeOfByte = 8;
unsigned OffsetInBits = Expr.getElement(++I) * SizeOfByte; unsigned OffsetInBits = I.getArg(1) * SizeOfByte;
unsigned SizeInBits = Expr.getElement(++I) * SizeOfByte; unsigned SizeInBits = I.getArg(2) * SizeOfByte;
AddOpPiece(SizeInBits, getOffsetOrZero(OffsetInBits, PieceOffsetInBits)); AddOpPiece(SizeInBits, getOffsetOrZero(OffsetInBits, PieceOffsetInBits));
break; break;
} }
case dwarf::DW_OP_plus: case dwarf::DW_OP_plus:
EmitOp(dwarf::DW_OP_plus_uconst); EmitOp(dwarf::DW_OP_plus_uconst);
EmitUnsigned(Expr.getElement(++I)); EmitUnsigned(I.getArg(1));
break; break;
case dwarf::DW_OP_deref: case dwarf::DW_OP_deref:
EmitOp(dwarf::DW_OP_deref); EmitOp(dwarf::DW_OP_deref);

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@@ -93,11 +93,10 @@ public:
/// \return false if no DWARF register exists for MachineReg. /// \return false if no DWARF register exists for MachineReg.
bool AddMachineRegExpression(DIExpression Expr, unsigned MachineReg, bool AddMachineRegExpression(DIExpression Expr, unsigned MachineReg,
unsigned PieceOffsetInBits = 0); unsigned PieceOffsetInBits = 0);
/// Emit a the operations in a DIExpression, starting from element I. /// Emit a the operations remaining the DIExpressionIterator I.
/// \param PieceOffsetInBits If this is one piece out of a fragmented /// \param PieceOffsetInBits If this is one piece out of a fragmented
/// location, this is the offset of the piece inside the entire variable. /// location, this is the offset of the piece inside the entire variable.
void AddExpression(DIExpression Expr, unsigned PieceOffsetInBits = 0, void AddExpression(DIExpressionIterator I, unsigned PieceOffsetInBits = 0);
unsigned I = 0);
}; };
/// DwarfExpression implementation for .debug_loc entries. /// DwarfExpression implementation for .debug_loc entries.