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https://github.com/c64scene-ar/llvm-6502.git
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Make DwarfExpression use the new DIExpressionIterator. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226748 91177308-0d34-0410-b5e6-96231b3b80d8
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@@ -200,55 +200,62 @@ static unsigned getOffsetOrZero(unsigned OffsetInBits,
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bool DwarfExpression::AddMachineRegExpression(DIExpression Expr,
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bool DwarfExpression::AddMachineRegExpression(DIExpression Expr,
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unsigned MachineReg,
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unsigned MachineReg,
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unsigned PieceOffsetInBits) {
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unsigned PieceOffsetInBits) {
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unsigned N = Expr.getNumElements();
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auto I = Expr.begin();
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unsigned I = 0;
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bool ValidReg = false;
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// Pattern-match combinations for which more efficient representations exist
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// Pattern-match combinations for which more efficient representations exist
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// first.
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// first.
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if (N >= 3 && Expr.getElement(0) == dwarf::DW_OP_piece) {
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if (I == Expr.end())
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return AddMachineRegPiece(MachineReg);
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bool ValidReg = false;
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switch (*I) {
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case dwarf::DW_OP_piece: {
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unsigned SizeOfByte = 8;
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unsigned SizeOfByte = 8;
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unsigned OffsetInBits = Expr.getElement(1) * SizeOfByte;
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unsigned OffsetInBits = I.getArg(1) * SizeOfByte;
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unsigned SizeInBits = Expr.getElement(2) * SizeOfByte;
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unsigned SizeInBits = I.getArg(2) * SizeOfByte;
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ValidReg =
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// Piece always comes at the end of the expression.
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AddMachineRegPiece(MachineReg, SizeInBits,
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return AddMachineRegPiece(MachineReg, SizeInBits,
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getOffsetOrZero(OffsetInBits, PieceOffsetInBits));
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getOffsetOrZero(OffsetInBits, PieceOffsetInBits));
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I = 3;
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}
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} else if (N >= 3 && Expr.getElement(0) == dwarf::DW_OP_plus &&
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case dwarf::DW_OP_plus:
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Expr.getElement(2) == dwarf::DW_OP_deref) {
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// [DW_OP_reg,Offset,DW_OP_plus,DW_OP_deref] --> [DW_OP_breg,Offset].
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// [DW_OP_reg,Offset,DW_OP_plus,DW_OP_deref] --> [DW_OP_breg,Offset].
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unsigned Offset = Expr.getElement(1);
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if (*std::next(I) == dwarf::DW_OP_deref) {
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unsigned Offset = I.getArg(1);
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ValidReg = AddMachineRegIndirect(MachineReg, Offset);
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ValidReg = AddMachineRegIndirect(MachineReg, Offset);
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I = 3;
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std::advance(I, 2);
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} else if (N >= 1 && Expr.getElement(0) == dwarf::DW_OP_deref) {
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break;
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// [DW_OP_reg,DW_OP_deref] --> [DW_OP_breg].
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ValidReg = AddMachineRegIndirect(MachineReg);
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I = 1;
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} else
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} else
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ValidReg = AddMachineRegPiece(MachineReg);
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ValidReg = AddMachineRegPiece(MachineReg);
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case dwarf::DW_OP_deref:
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// [DW_OP_reg,DW_OP_deref] --> [DW_OP_breg].
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ValidReg = AddMachineRegIndirect(MachineReg);
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++I;
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break;
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default:
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llvm_unreachable("unsupported operand");
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}
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if (!ValidReg)
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if (!ValidReg)
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return false;
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return false;
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// Emit remaining elements of the expression.
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// Emit remaining elements of the expression.
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AddExpression(Expr, I);
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AddExpression(I, PieceOffsetInBits);
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return true;
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return true;
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}
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}
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void DwarfExpression::AddExpression(DIExpression Expr, unsigned I,
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void DwarfExpression::AddExpression(DIExpressionIterator I,
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unsigned PieceOffsetInBits) {
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unsigned PieceOffsetInBits) {
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unsigned N = Expr.getNumElements();
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for (; I != DIExpressionIterator(); ++I) {
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for (; I < N; ++I) {
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switch (*I) {
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switch (Expr.getElement(I)) {
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case dwarf::DW_OP_piece: {
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case dwarf::DW_OP_piece: {
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unsigned SizeOfByte = 8;
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unsigned SizeOfByte = 8;
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unsigned OffsetInBits = Expr.getElement(++I) * SizeOfByte;
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unsigned OffsetInBits = I.getArg(1) * SizeOfByte;
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unsigned SizeInBits = Expr.getElement(++I) * SizeOfByte;
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unsigned SizeInBits = I.getArg(2) * SizeOfByte;
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AddOpPiece(SizeInBits, getOffsetOrZero(OffsetInBits, PieceOffsetInBits));
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AddOpPiece(SizeInBits, getOffsetOrZero(OffsetInBits, PieceOffsetInBits));
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break;
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break;
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}
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}
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case dwarf::DW_OP_plus:
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case dwarf::DW_OP_plus:
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EmitOp(dwarf::DW_OP_plus_uconst);
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EmitOp(dwarf::DW_OP_plus_uconst);
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EmitUnsigned(Expr.getElement(++I));
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EmitUnsigned(I.getArg(1));
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break;
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break;
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case dwarf::DW_OP_deref:
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case dwarf::DW_OP_deref:
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EmitOp(dwarf::DW_OP_deref);
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EmitOp(dwarf::DW_OP_deref);
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@@ -93,11 +93,10 @@ public:
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/// \return false if no DWARF register exists for MachineReg.
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/// \return false if no DWARF register exists for MachineReg.
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bool AddMachineRegExpression(DIExpression Expr, unsigned MachineReg,
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bool AddMachineRegExpression(DIExpression Expr, unsigned MachineReg,
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unsigned PieceOffsetInBits = 0);
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unsigned PieceOffsetInBits = 0);
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/// Emit a the operations in a DIExpression, starting from element I.
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/// Emit a the operations remaining the DIExpressionIterator I.
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/// \param PieceOffsetInBits If this is one piece out of a fragmented
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/// \param PieceOffsetInBits If this is one piece out of a fragmented
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/// location, this is the offset of the piece inside the entire variable.
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/// location, this is the offset of the piece inside the entire variable.
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void AddExpression(DIExpression Expr, unsigned PieceOffsetInBits = 0,
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void AddExpression(DIExpressionIterator I, unsigned PieceOffsetInBits = 0);
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unsigned I = 0);
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};
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};
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/// DwarfExpression implementation for .debug_loc entries.
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/// DwarfExpression implementation for .debug_loc entries.
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