mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-08-21 18:29:46 +00:00
Change errs() to dbgs().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92529 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
parent
5242154b55
commit
8a34229dcf
@ -146,7 +146,7 @@ void LiveIntervals::printInstrs(raw_ostream &OS) const {
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}
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}
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void LiveIntervals::dumpInstrs() const {
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void LiveIntervals::dumpInstrs() const {
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printInstrs(errs());
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printInstrs(dbgs());
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}
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}
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bool LiveIntervals::conflictsWithPhysReg(const LiveInterval &li,
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bool LiveIntervals::conflictsWithPhysReg(const LiveInterval &li,
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@ -253,9 +253,9 @@ bool LiveIntervals::conflictsWithPhysRegRef(LiveInterval &li,
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#ifndef NDEBUG
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#ifndef NDEBUG
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static void printRegName(unsigned reg, const TargetRegisterInfo* tri_) {
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static void printRegName(unsigned reg, const TargetRegisterInfo* tri_) {
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if (TargetRegisterInfo::isPhysicalRegister(reg))
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if (TargetRegisterInfo::isPhysicalRegister(reg))
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errs() << tri_->getName(reg);
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dbgs() << tri_->getName(reg);
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else
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else
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errs() << "%reg" << reg;
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dbgs() << "%reg" << reg;
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}
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}
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#endif
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#endif
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@ -266,7 +266,7 @@ void LiveIntervals::handleVirtualRegisterDef(MachineBasicBlock *mbb,
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unsigned MOIdx,
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unsigned MOIdx,
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LiveInterval &interval) {
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LiveInterval &interval) {
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DEBUG({
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DEBUG({
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errs() << "\t\tregister: ";
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dbgs() << "\t\tregister: ";
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printRegName(interval.reg, tri_);
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printRegName(interval.reg, tri_);
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});
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});
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@ -314,7 +314,7 @@ void LiveIntervals::handleVirtualRegisterDef(MachineBasicBlock *mbb,
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"Shouldn't be alive across any blocks!");
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"Shouldn't be alive across any blocks!");
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LiveRange LR(defIndex, killIdx, ValNo);
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LiveRange LR(defIndex, killIdx, ValNo);
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interval.addRange(LR);
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interval.addRange(LR);
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DEBUG(errs() << " +" << LR << "\n");
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DEBUG(dbgs() << " +" << LR << "\n");
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ValNo->addKill(killIdx);
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ValNo->addKill(killIdx);
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return;
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return;
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}
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}
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@ -325,7 +325,7 @@ void LiveIntervals::handleVirtualRegisterDef(MachineBasicBlock *mbb,
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// live into some number of blocks, but gets killed. Start by adding a
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// live into some number of blocks, but gets killed. Start by adding a
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// range that goes from this definition to the end of the defining block.
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// range that goes from this definition to the end of the defining block.
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LiveRange NewLR(defIndex, getMBBEndIdx(mbb), ValNo);
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LiveRange NewLR(defIndex, getMBBEndIdx(mbb), ValNo);
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DEBUG(errs() << " +" << NewLR);
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DEBUG(dbgs() << " +" << NewLR);
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interval.addRange(NewLR);
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interval.addRange(NewLR);
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// Iterate over all of the blocks that the variable is completely
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// Iterate over all of the blocks that the variable is completely
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@ -336,7 +336,7 @@ void LiveIntervals::handleVirtualRegisterDef(MachineBasicBlock *mbb,
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MachineBasicBlock *aliveBlock = mf_->getBlockNumbered(*I);
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MachineBasicBlock *aliveBlock = mf_->getBlockNumbered(*I);
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LiveRange LR(getMBBStartIdx(aliveBlock), getMBBEndIdx(aliveBlock), ValNo);
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LiveRange LR(getMBBStartIdx(aliveBlock), getMBBEndIdx(aliveBlock), ValNo);
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interval.addRange(LR);
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interval.addRange(LR);
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DEBUG(errs() << " +" << LR);
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DEBUG(dbgs() << " +" << LR);
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}
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}
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// Finally, this virtual register is live from the start of any killing
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// Finally, this virtual register is live from the start of any killing
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@ -348,7 +348,7 @@ void LiveIntervals::handleVirtualRegisterDef(MachineBasicBlock *mbb,
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LiveRange LR(getMBBStartIdx(Kill->getParent()), killIdx, ValNo);
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LiveRange LR(getMBBStartIdx(Kill->getParent()), killIdx, ValNo);
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interval.addRange(LR);
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interval.addRange(LR);
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ValNo->addKill(killIdx);
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ValNo->addKill(killIdx);
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DEBUG(errs() << " +" << LR);
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DEBUG(dbgs() << " +" << LR);
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}
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}
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} else {
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} else {
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@ -393,7 +393,7 @@ void LiveIntervals::handleVirtualRegisterDef(MachineBasicBlock *mbb,
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// Add the new live interval which replaces the range for the input copy.
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// Add the new live interval which replaces the range for the input copy.
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LiveRange LR(DefIndex, RedefIndex, ValNo);
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LiveRange LR(DefIndex, RedefIndex, ValNo);
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DEBUG(errs() << " replace range with " << LR);
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DEBUG(dbgs() << " replace range with " << LR);
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interval.addRange(LR);
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interval.addRange(LR);
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ValNo->addKill(RedefIndex);
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ValNo->addKill(RedefIndex);
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@ -404,8 +404,8 @@ void LiveIntervals::handleVirtualRegisterDef(MachineBasicBlock *mbb,
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OldValNo));
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OldValNo));
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DEBUG({
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DEBUG({
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errs() << " RESULT: ";
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dbgs() << " RESULT: ";
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interval.print(errs(), tri_);
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interval.print(dbgs(), tri_);
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});
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});
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} else {
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} else {
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// Otherwise, this must be because of phi elimination. If this is the
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// Otherwise, this must be because of phi elimination. If this is the
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@ -422,8 +422,8 @@ void LiveIntervals::handleVirtualRegisterDef(MachineBasicBlock *mbb,
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SlotIndex Start = getMBBStartIdx(Killer->getParent());
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SlotIndex Start = getMBBStartIdx(Killer->getParent());
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SlotIndex End = getInstructionIndex(Killer).getDefIndex();
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SlotIndex End = getInstructionIndex(Killer).getDefIndex();
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DEBUG({
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DEBUG({
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errs() << "\n\t\trenaming [" << Start << "," << End << "] in: ";
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dbgs() << "\n\t\trenaming [" << Start << "," << End << "] in: ";
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interval.print(errs(), tri_);
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interval.print(dbgs(), tri_);
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});
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});
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interval.removeRange(Start, End);
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interval.removeRange(Start, End);
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@ -442,8 +442,8 @@ void LiveIntervals::handleVirtualRegisterDef(MachineBasicBlock *mbb,
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VNI->addKill(indexes_->getTerminatorGap(killMBB));
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VNI->addKill(indexes_->getTerminatorGap(killMBB));
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VNI->setHasPHIKill(true);
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VNI->setHasPHIKill(true);
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DEBUG({
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DEBUG({
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errs() << " RESULT: ";
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dbgs() << " RESULT: ";
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interval.print(errs(), tri_);
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interval.print(dbgs(), tri_);
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});
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});
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}
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}
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@ -469,11 +469,11 @@ void LiveIntervals::handleVirtualRegisterDef(MachineBasicBlock *mbb,
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interval.addRange(LR);
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interval.addRange(LR);
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ValNo->addKill(indexes_->getTerminatorGap(mbb));
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ValNo->addKill(indexes_->getTerminatorGap(mbb));
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ValNo->setHasPHIKill(true);
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ValNo->setHasPHIKill(true);
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DEBUG(errs() << " +" << LR);
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DEBUG(dbgs() << " +" << LR);
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}
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}
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}
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}
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DEBUG(errs() << '\n');
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DEBUG(dbgs() << '\n');
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}
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}
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void LiveIntervals::handlePhysicalRegisterDef(MachineBasicBlock *MBB,
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void LiveIntervals::handlePhysicalRegisterDef(MachineBasicBlock *MBB,
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@ -485,7 +485,7 @@ void LiveIntervals::handlePhysicalRegisterDef(MachineBasicBlock *MBB,
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// A physical register cannot be live across basic block, so its
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// A physical register cannot be live across basic block, so its
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// lifetime must end somewhere in its defining basic block.
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// lifetime must end somewhere in its defining basic block.
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DEBUG({
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DEBUG({
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errs() << "\t\tregister: ";
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dbgs() << "\t\tregister: ";
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printRegName(interval.reg, tri_);
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printRegName(interval.reg, tri_);
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});
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});
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@ -502,7 +502,7 @@ void LiveIntervals::handlePhysicalRegisterDef(MachineBasicBlock *MBB,
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// For earlyclobbers, the defSlot was pushed back one; the extra
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// For earlyclobbers, the defSlot was pushed back one; the extra
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// advance below compensates.
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// advance below compensates.
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if (MO.isDead()) {
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if (MO.isDead()) {
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DEBUG(errs() << " dead");
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DEBUG(dbgs() << " dead");
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end = start.getStoreIndex();
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end = start.getStoreIndex();
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goto exit;
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goto exit;
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}
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}
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@ -517,7 +517,7 @@ void LiveIntervals::handlePhysicalRegisterDef(MachineBasicBlock *MBB,
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baseIndex = indexes_->getNextNonNullIndex(baseIndex);
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baseIndex = indexes_->getNextNonNullIndex(baseIndex);
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if (mi->killsRegister(interval.reg, tri_)) {
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if (mi->killsRegister(interval.reg, tri_)) {
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DEBUG(errs() << " killed");
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DEBUG(dbgs() << " killed");
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end = baseIndex.getDefIndex();
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end = baseIndex.getDefIndex();
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goto exit;
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goto exit;
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} else {
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} else {
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@ -531,7 +531,7 @@ void LiveIntervals::handlePhysicalRegisterDef(MachineBasicBlock *MBB,
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// Then the register is essentially dead at the instruction that defines
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// Then the register is essentially dead at the instruction that defines
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// it. Hence its interval is:
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// it. Hence its interval is:
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// [defSlot(def), defSlot(def)+1)
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// [defSlot(def), defSlot(def)+1)
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DEBUG(errs() << " dead");
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DEBUG(dbgs() << " dead");
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end = start.getStoreIndex();
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end = start.getStoreIndex();
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}
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}
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goto exit;
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goto exit;
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@ -560,7 +560,7 @@ exit:
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LiveRange LR(start, end, ValNo);
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LiveRange LR(start, end, ValNo);
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interval.addRange(LR);
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interval.addRange(LR);
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LR.valno->addKill(end);
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LR.valno->addKill(end);
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DEBUG(errs() << " +" << LR << '\n');
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DEBUG(dbgs() << " +" << LR << '\n');
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}
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}
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void LiveIntervals::handleRegisterDef(MachineBasicBlock *MBB,
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void LiveIntervals::handleRegisterDef(MachineBasicBlock *MBB,
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@ -595,7 +595,7 @@ void LiveIntervals::handleLiveInRegister(MachineBasicBlock *MBB,
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SlotIndex MIIdx,
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SlotIndex MIIdx,
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LiveInterval &interval, bool isAlias) {
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LiveInterval &interval, bool isAlias) {
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DEBUG({
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DEBUG({
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errs() << "\t\tlivein register: ";
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dbgs() << "\t\tlivein register: ";
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printRegName(interval.reg, tri_);
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printRegName(interval.reg, tri_);
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});
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});
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@ -612,7 +612,7 @@ void LiveIntervals::handleLiveInRegister(MachineBasicBlock *MBB,
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while (mi != MBB->end()) {
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while (mi != MBB->end()) {
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if (mi->killsRegister(interval.reg, tri_)) {
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if (mi->killsRegister(interval.reg, tri_)) {
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DEBUG(errs() << " killed");
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DEBUG(dbgs() << " killed");
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end = baseIndex.getDefIndex();
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end = baseIndex.getDefIndex();
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SeenDefUse = true;
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SeenDefUse = true;
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break;
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break;
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@ -621,7 +621,7 @@ void LiveIntervals::handleLiveInRegister(MachineBasicBlock *MBB,
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// Then the register is essentially dead at the instruction that defines
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// Then the register is essentially dead at the instruction that defines
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// it. Hence its interval is:
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// it. Hence its interval is:
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// [defSlot(def), defSlot(def)+1)
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// [defSlot(def), defSlot(def)+1)
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DEBUG(errs() << " dead");
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DEBUG(dbgs() << " dead");
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end = start.getStoreIndex();
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end = start.getStoreIndex();
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SeenDefUse = true;
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SeenDefUse = true;
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break;
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break;
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@ -636,10 +636,10 @@ void LiveIntervals::handleLiveInRegister(MachineBasicBlock *MBB,
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// Live-in register might not be used at all.
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// Live-in register might not be used at all.
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if (!SeenDefUse) {
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if (!SeenDefUse) {
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if (isAlias) {
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if (isAlias) {
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DEBUG(errs() << " dead");
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DEBUG(dbgs() << " dead");
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end = MIIdx.getStoreIndex();
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end = MIIdx.getStoreIndex();
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} else {
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} else {
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DEBUG(errs() << " live through");
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DEBUG(dbgs() << " live through");
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end = baseIndex;
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end = baseIndex;
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}
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}
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}
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}
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@ -652,7 +652,7 @@ void LiveIntervals::handleLiveInRegister(MachineBasicBlock *MBB,
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interval.addRange(LR);
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interval.addRange(LR);
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LR.valno->addKill(end);
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LR.valno->addKill(end);
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DEBUG(errs() << " +" << LR << '\n');
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DEBUG(dbgs() << " +" << LR << '\n');
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}
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}
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/// computeIntervals - computes the live intervals for virtual
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/// computeIntervals - computes the live intervals for virtual
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@ -660,7 +660,7 @@ void LiveIntervals::handleLiveInRegister(MachineBasicBlock *MBB,
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/// live interval is an interval [i, j) where 1 <= i <= j < N for
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/// live interval is an interval [i, j) where 1 <= i <= j < N for
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/// which a variable is live
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/// which a variable is live
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void LiveIntervals::computeIntervals() {
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void LiveIntervals::computeIntervals() {
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DEBUG(errs() << "********** COMPUTING LIVE INTERVALS **********\n"
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DEBUG(dbgs() << "********** COMPUTING LIVE INTERVALS **********\n"
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<< "********** Function: "
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<< "********** Function: "
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<< ((Value*)mf_->getFunction())->getName() << '\n');
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<< ((Value*)mf_->getFunction())->getName() << '\n');
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@ -670,7 +670,7 @@ void LiveIntervals::computeIntervals() {
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MachineBasicBlock *MBB = MBBI;
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MachineBasicBlock *MBB = MBBI;
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// Track the index of the current machine instr.
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// Track the index of the current machine instr.
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SlotIndex MIIndex = getMBBStartIdx(MBB);
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SlotIndex MIIndex = getMBBStartIdx(MBB);
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DEBUG(errs() << MBB->getName() << ":\n");
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DEBUG(dbgs() << MBB->getName() << ":\n");
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MachineBasicBlock::iterator MI = MBB->begin(), miEnd = MBB->end();
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MachineBasicBlock::iterator MI = MBB->begin(), miEnd = MBB->end();
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@ -690,7 +690,7 @@ void LiveIntervals::computeIntervals() {
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MIIndex = indexes_->getNextNonNullIndex(MIIndex);
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MIIndex = indexes_->getNextNonNullIndex(MIIndex);
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for (; MI != miEnd; ++MI) {
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for (; MI != miEnd; ++MI) {
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DEBUG(errs() << MIIndex << "\t" << *MI);
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DEBUG(dbgs() << MIIndex << "\t" << *MI);
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// Handle defs.
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// Handle defs.
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for (int i = MI->getNumOperands() - 1; i >= 0; --i) {
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for (int i = MI->getNumOperands() - 1; i >= 0; --i) {
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@ -1055,7 +1055,7 @@ rewriteInstructionForSpills(const LiveInterval &li, const VNInfo *VNI,
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// If this is the rematerializable definition MI itself and
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// If this is the rematerializable definition MI itself and
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// all of its uses are rematerialized, simply delete it.
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// all of its uses are rematerialized, simply delete it.
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if (MI == ReMatOrigDefMI && CanDelete) {
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if (MI == ReMatOrigDefMI && CanDelete) {
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DEBUG(errs() << "\t\t\t\tErasing re-materlizable def: "
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DEBUG(dbgs() << "\t\t\t\tErasing re-materlizable def: "
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<< MI << '\n');
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<< MI << '\n');
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RemoveMachineInstrFromMaps(MI);
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RemoveMachineInstrFromMaps(MI);
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vrm.RemoveMachineInstrFromMaps(MI);
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vrm.RemoveMachineInstrFromMaps(MI);
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@ -1208,28 +1208,28 @@ rewriteInstructionForSpills(const LiveInterval &li, const VNInfo *VNI,
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if (CreatedNewVReg) {
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if (CreatedNewVReg) {
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LiveRange LR(index.getLoadIndex(), index.getDefIndex(),
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LiveRange LR(index.getLoadIndex(), index.getDefIndex(),
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nI.getNextValue(SlotIndex(), 0, false, VNInfoAllocator));
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nI.getNextValue(SlotIndex(), 0, false, VNInfoAllocator));
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DEBUG(errs() << " +" << LR);
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DEBUG(dbgs() << " +" << LR);
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nI.addRange(LR);
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nI.addRange(LR);
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} else {
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} else {
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// Extend the split live interval to this def / use.
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// Extend the split live interval to this def / use.
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SlotIndex End = index.getDefIndex();
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SlotIndex End = index.getDefIndex();
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LiveRange LR(nI.ranges[nI.ranges.size()-1].end, End,
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LiveRange LR(nI.ranges[nI.ranges.size()-1].end, End,
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nI.getValNumInfo(nI.getNumValNums()-1));
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nI.getValNumInfo(nI.getNumValNums()-1));
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DEBUG(errs() << " +" << LR);
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DEBUG(dbgs() << " +" << LR);
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nI.addRange(LR);
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nI.addRange(LR);
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}
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}
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}
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}
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if (HasDef) {
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if (HasDef) {
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LiveRange LR(index.getDefIndex(), index.getStoreIndex(),
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LiveRange LR(index.getDefIndex(), index.getStoreIndex(),
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nI.getNextValue(SlotIndex(), 0, false, VNInfoAllocator));
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nI.getNextValue(SlotIndex(), 0, false, VNInfoAllocator));
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DEBUG(errs() << " +" << LR);
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DEBUG(dbgs() << " +" << LR);
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nI.addRange(LR);
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nI.addRange(LR);
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}
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}
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DEBUG({
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DEBUG({
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errs() << "\t\t\t\tAdded new interval: ";
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dbgs() << "\t\t\t\tAdded new interval: ";
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nI.print(errs(), tri_);
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nI.print(dbgs(), tri_);
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errs() << '\n';
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dbgs() << '\n';
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});
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});
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}
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}
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return CanFold;
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return CanFold;
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@ -1557,9 +1557,9 @@ addIntervalsForSpillsFast(const LiveInterval &li,
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"attempt to spill already spilled interval!");
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"attempt to spill already spilled interval!");
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DEBUG({
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DEBUG({
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errs() << "\t\t\t\tadding intervals for spills for interval: ";
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dbgs() << "\t\t\t\tadding intervals for spills for interval: ";
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li.dump();
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li.dump();
|
||||||
errs() << '\n';
|
dbgs() << '\n';
|
||||||
});
|
});
|
||||||
|
|
||||||
const TargetRegisterClass* rc = mri_->getRegClass(li.reg);
|
const TargetRegisterClass* rc = mri_->getRegClass(li.reg);
|
||||||
@ -1610,7 +1610,7 @@ addIntervalsForSpillsFast(const LiveInterval &li,
|
|||||||
LiveRange LR(index.getLoadIndex(), index.getUseIndex(),
|
LiveRange LR(index.getLoadIndex(), index.getUseIndex(),
|
||||||
nI.getNextValue(SlotIndex(), 0, false,
|
nI.getNextValue(SlotIndex(), 0, false,
|
||||||
getVNInfoAllocator()));
|
getVNInfoAllocator()));
|
||||||
DEBUG(errs() << " +" << LR);
|
DEBUG(dbgs() << " +" << LR);
|
||||||
nI.addRange(LR);
|
nI.addRange(LR);
|
||||||
vrm.addRestorePoint(NewVReg, MI);
|
vrm.addRestorePoint(NewVReg, MI);
|
||||||
}
|
}
|
||||||
@ -1618,7 +1618,7 @@ addIntervalsForSpillsFast(const LiveInterval &li,
|
|||||||
LiveRange LR(index.getDefIndex(), index.getStoreIndex(),
|
LiveRange LR(index.getDefIndex(), index.getStoreIndex(),
|
||||||
nI.getNextValue(SlotIndex(), 0, false,
|
nI.getNextValue(SlotIndex(), 0, false,
|
||||||
getVNInfoAllocator()));
|
getVNInfoAllocator()));
|
||||||
DEBUG(errs() << " +" << LR);
|
DEBUG(dbgs() << " +" << LR);
|
||||||
nI.addRange(LR);
|
nI.addRange(LR);
|
||||||
vrm.addSpillPoint(NewVReg, true, MI);
|
vrm.addSpillPoint(NewVReg, true, MI);
|
||||||
}
|
}
|
||||||
@ -1626,9 +1626,9 @@ addIntervalsForSpillsFast(const LiveInterval &li,
|
|||||||
added.push_back(&nI);
|
added.push_back(&nI);
|
||||||
|
|
||||||
DEBUG({
|
DEBUG({
|
||||||
errs() << "\t\t\t\tadded new interval: ";
|
dbgs() << "\t\t\t\tadded new interval: ";
|
||||||
nI.dump();
|
nI.dump();
|
||||||
errs() << '\n';
|
dbgs() << '\n';
|
||||||
});
|
});
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -1651,9 +1651,9 @@ addIntervalsForSpills(const LiveInterval &li,
|
|||||||
"attempt to spill already spilled interval!");
|
"attempt to spill already spilled interval!");
|
||||||
|
|
||||||
DEBUG({
|
DEBUG({
|
||||||
errs() << "\t\t\t\tadding intervals for spills for interval: ";
|
dbgs() << "\t\t\t\tadding intervals for spills for interval: ";
|
||||||
li.print(errs(), tri_);
|
li.print(dbgs(), tri_);
|
||||||
errs() << '\n';
|
dbgs() << '\n';
|
||||||
});
|
});
|
||||||
|
|
||||||
// Each bit specify whether a spill is required in the MBB.
|
// Each bit specify whether a spill is required in the MBB.
|
||||||
|
Loading…
Reference in New Issue
Block a user