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Some typo's
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25374 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -2686,42 +2686,42 @@ def FpADD32m : FpI<(ops RFP:$dst, RFP:$src1, f32mem:$src2), OneArgFPRW,
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[(set RFP:$dst, (fadd RFP:$src1,
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(extloadf64f32 addr:$src2)))]>;
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// ST(0) = ST(0) + [mem32]
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def FpADD64m : FpI<(ops RFP:$dst, RFP:$src1, f32mem:$src2), OneArgFPRW,
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def FpADD64m : FpI<(ops RFP:$dst, RFP:$src1, f64mem:$src2), OneArgFPRW,
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[(set RFP:$dst, (fadd RFP:$src1, (loadf64 addr:$src2)))]>;
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// ST(0) = ST(0) + [mem64]
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def FpMUL32m : FpI<(ops RFP:$dst, RFP:$src1, f32mem:$src2), OneArgFPRW,
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[(set RFP:$dst, (fmul RFP:$src1,
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(extloadf64f32 addr:$src2)))]>;
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// ST(0) = ST(0) * [mem32]
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def FpMUL64m : FpI<(ops RFP:$dst, RFP:$src1, f32mem:$src2), OneArgFPRW,
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def FpMUL64m : FpI<(ops RFP:$dst, RFP:$src1, f64mem:$src2), OneArgFPRW,
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[(set RFP:$dst, (fmul RFP:$src1, (loadf64 addr:$src2)))]>;
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// ST(0) = ST(0) * [mem64]
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def FpSUB32m : FpI<(ops RFP:$dst, RFP:$src1, f32mem:$src2), OneArgFPRW,
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[(set RFP:$dst, (fsub RFP:$src1,
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(extloadf64f32 addr:$src2)))]>;
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// ST(0) = ST(0) - [mem32]
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def FpSUB64m : FpI<(ops RFP:$dst, RFP:$src1, f32mem:$src2), OneArgFPRW,
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def FpSUB64m : FpI<(ops RFP:$dst, RFP:$src1, f64mem:$src2), OneArgFPRW,
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[(set RFP:$dst, (fsub RFP:$src1, (loadf64 addr:$src2)))]>;
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// ST(0) = ST(0) - [mem64]
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def FpSUBR32m : FpI<(ops RFP:$dst, RFP:$src1, f32mem:$src2), OneArgFPRW,
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[(set RFP:$dst, (fsub (extloadf64f32 addr:$src2),
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RFP:$src1))]>;
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// ST(0) = [mem32] - ST(0)
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def FpSUBR64m : FpI<(ops RFP:$dst, RFP:$src1, f32mem:$src2), OneArgFPRW,
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def FpSUBR64m : FpI<(ops RFP:$dst, RFP:$src1, f64mem:$src2), OneArgFPRW,
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[(set RFP:$dst, (fsub (loadf64 addr:$src2), RFP:$src1))]>;
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// ST(0) = [mem64] - ST(0)
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def FpDIV32m : FpI<(ops RFP:$dst, RFP:$src1, f32mem:$src2), OneArgFPRW,
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[(set RFP:$dst, (fdiv RFP:$src1,
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(extloadf64f32 addr:$src2)))]>;
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// ST(0) = ST(0) / [mem32]
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def FpDIV64m : FpI<(ops RFP:$dst, RFP:$src1, f32mem:$src2), OneArgFPRW,
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def FpDIV64m : FpI<(ops RFP:$dst, RFP:$src1, f64mem:$src2), OneArgFPRW,
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[(set RFP:$dst, (fdiv RFP:$src1, (loadf64 addr:$src2)))]>;
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// ST(0) = ST(0) / [mem64]
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def FpDIVR32m : FpI<(ops RFP:$dst, RFP:$src1, f32mem:$src2), OneArgFPRW,
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[(set RFP:$dst, (fdiv (extloadf64f32 addr:$src2),
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RFP:$src1))]>;
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// ST(0) = [mem32] / ST(0)
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def FpDIVR64m : FpI<(ops RFP:$dst, RFP:$src1, f32mem:$src2), OneArgFPRW,
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def FpDIVR64m : FpI<(ops RFP:$dst, RFP:$src1, f64mem:$src2), OneArgFPRW,
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[(set RFP:$dst, (fdiv (loadf64 addr:$src2), RFP:$src1))]>;
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// ST(0) = [mem64] / ST(0)
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@ -2739,12 +2739,11 @@ def FDIV64m : FPI<0xDC, MRM6m, (ops f64mem:$src), "fdiv{l} $src">;
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def FDIVR32m : FPI<0xD8, MRM7m, (ops f32mem:$src), "fdivr{s} $src">;
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def FDIVR64m : FPI<0xDC, MRM7m, (ops f64mem:$src), "fdivr{l} $src">;
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// FIXME: Implement these when we have a dag-dag isel!
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def FpIADD16m : FpI<(ops RFP:$dst, RFP:$src1, i16mem:$src2), OneArgFPRW,
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[(set RFP:$dst, (fadd RFP:$src1,
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(X86fild addr:$src2, i16)))]>;
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// ST(0) = ST(0) + [mem16int]
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def FpIADD32m : FpI<(ops RFP:$dst, RFP:$src1, i16mem:$src2), OneArgFPRW,
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def FpIADD32m : FpI<(ops RFP:$dst, RFP:$src1, i32mem:$src2), OneArgFPRW,
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[(set RFP:$dst, (fadd RFP:$src1,
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(X86fild addr:$src2, i32)))]>;
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// ST(0) = ST(0) + [mem32int]
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@ -2752,7 +2751,7 @@ def FpIMUL16m : FpI<(ops RFP:$dst, RFP:$src1, i16mem:$src2), OneArgFPRW,
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[(set RFP:$dst, (fmul RFP:$src1,
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(X86fild addr:$src2, i16)))]>;
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// ST(0) = ST(0) * [mem16int]
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def FpIMUL32m : FpI<(ops RFP:$dst, RFP:$src1, i16mem:$src2), OneArgFPRW,
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def FpIMUL32m : FpI<(ops RFP:$dst, RFP:$src1, i32mem:$src2), OneArgFPRW,
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[(set RFP:$dst, (fmul RFP:$src1,
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(X86fild addr:$src2, i32)))]>;
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// ST(0) = ST(0) * [mem32int]
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@ -2760,7 +2759,7 @@ def FpISUB16m : FpI<(ops RFP:$dst, RFP:$src1, i16mem:$src2), OneArgFPRW,
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[(set RFP:$dst, (fsub RFP:$src1,
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(X86fild addr:$src2, i16)))]>;
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// ST(0) = ST(0) - [mem16int]
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def FpISUB32m : FpI<(ops RFP:$dst, RFP:$src1, i16mem:$src2), OneArgFPRW,
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def FpISUB32m : FpI<(ops RFP:$dst, RFP:$src1, i32mem:$src2), OneArgFPRW,
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[(set RFP:$dst, (fsub RFP:$src1,
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(X86fild addr:$src2, i32)))]>;
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// ST(0) = ST(0) - [mem32int]
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@ -2768,7 +2767,7 @@ def FpISUBR16m : FpI<(ops RFP:$dst, RFP:$src1, i16mem:$src2), OneArgFPRW,
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[(set RFP:$dst, (fsub (X86fild addr:$src2, i16),
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RFP:$src1))]>;
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// ST(0) = [mem16int] - ST(0)
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def FpISUBR32m : FpI<(ops RFP:$dst, RFP:$src1, i16mem:$src2), OneArgFPRW,
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def FpISUBR32m : FpI<(ops RFP:$dst, RFP:$src1, i32mem:$src2), OneArgFPRW,
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[(set RFP:$dst, (fsub (X86fild addr:$src2, i32),
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RFP:$src1))]>;
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// ST(0) = [mem32int] - ST(0)
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@ -2776,7 +2775,7 @@ def FpIDIV16m : FpI<(ops RFP:$dst, RFP:$src1, i16mem:$src2), OneArgFPRW,
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[(set RFP:$dst, (fdiv RFP:$src1,
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(X86fild addr:$src2, i16)))]>;
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// ST(0) = ST(0) / [mem16int]
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def FpIDIV32m : FpI<(ops RFP:$dst, RFP:$src1, i16mem:$src2), OneArgFPRW,
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def FpIDIV32m : FpI<(ops RFP:$dst, RFP:$src1, i32mem:$src2), OneArgFPRW,
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[(set RFP:$dst, (fdiv RFP:$src1,
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(X86fild addr:$src2, i32)))]>;
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// ST(0) = ST(0) / [mem32int]
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@ -2784,7 +2783,7 @@ def FpIDIVR16m : FpI<(ops RFP:$dst, RFP:$src1, i16mem:$src2), OneArgFPRW,
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[(set RFP:$dst, (fdiv (X86fild addr:$src2, i16),
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RFP:$src1))]>;
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// ST(0) = [mem16int] / ST(0)
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def FpIDIVR32m : FpI<(ops RFP:$dst, RFP:$src1, i16mem:$src2), OneArgFPRW,
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def FpIDIVR32m : FpI<(ops RFP:$dst, RFP:$src1, i32mem:$src2), OneArgFPRW,
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[(set RFP:$dst, (fdiv (X86fild addr:$src2, i32),
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RFP:$src1))]>;
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// ST(0) = [mem32int] / ST(0)
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