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Move global variables in TargetMachine into new TargetOptions class. As an API

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change, now you need a TargetOptions object to create a TargetMachine. Clang
patch to follow.

One small functionality change in PTX. PTX had commented out the machine
verifier parts in their copy of printAndVerify. That now calls the version in
LLVMTargetMachine. Users of PTX who need verification disabled should rely on
not passing the command-line flag to enable it.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145714 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Nick Lewycky
2011-12-02 22:16:29 +00:00
parent c4f0b309ee
commit 8a8d479214
62 changed files with 727 additions and 601 deletions
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lib/CodeGen/Analysis.cpp
+35 -27
View File
@@ -1,4 +1,4 @@
//===-- Analysis.cpp - CodeGen LLVM IR Analysis Utilities --*- C++ ------*-===//
//===-- Analysis.cpp - CodeGen LLVM IR Analysis Utilities -----------------===//
//
// The LLVM Compiler Infrastructure
//
@@ -149,33 +149,40 @@ llvm::hasInlineAsmMemConstraint(InlineAsm::ConstraintInfoVector &CInfos,
/// consideration of global floating-point math flags.
///
ISD::CondCode llvm::getFCmpCondCode(FCmpInst::Predicate Pred) {
ISD::CondCode FPC, FOC;
switch (Pred) {
case FCmpInst::FCMP_FALSE: FOC = FPC = ISD::SETFALSE; break;
case FCmpInst::FCMP_OEQ: FOC = ISD::SETEQ; FPC = ISD::SETOEQ; break;
case FCmpInst::FCMP_OGT: FOC = ISD::SETGT; FPC = ISD::SETOGT; break;
case FCmpInst::FCMP_OGE: FOC = ISD::SETGE; FPC = ISD::SETOGE; break;
case FCmpInst::FCMP_OLT: FOC = ISD::SETLT; FPC = ISD::SETOLT; break;
case FCmpInst::FCMP_OLE: FOC = ISD::SETLE; FPC = ISD::SETOLE; break;
case FCmpInst::FCMP_ONE: FOC = ISD::SETNE; FPC = ISD::SETONE; break;
case FCmpInst::FCMP_ORD: FOC = FPC = ISD::SETO; break;
case FCmpInst::FCMP_UNO: FOC = FPC = ISD::SETUO; break;
case FCmpInst::FCMP_UEQ: FOC = ISD::SETEQ; FPC = ISD::SETUEQ; break;
case FCmpInst::FCMP_UGT: FOC = ISD::SETGT; FPC = ISD::SETUGT; break;
case FCmpInst::FCMP_UGE: FOC = ISD::SETGE; FPC = ISD::SETUGE; break;
case FCmpInst::FCMP_ULT: FOC = ISD::SETLT; FPC = ISD::SETULT; break;
case FCmpInst::FCMP_ULE: FOC = ISD::SETLE; FPC = ISD::SETULE; break;
case FCmpInst::FCMP_UNE: FOC = ISD::SETNE; FPC = ISD::SETUNE; break;
case FCmpInst::FCMP_TRUE: FOC = FPC = ISD::SETTRUE; break;
default:
llvm_unreachable("Invalid FCmp predicate opcode!");
FOC = FPC = ISD::SETFALSE;
break;
case FCmpInst::FCMP_FALSE: return ISD::SETFALSE;
case FCmpInst::FCMP_OEQ: return ISD::SETOEQ;
case FCmpInst::FCMP_OGT: return ISD::SETOGT;
case FCmpInst::FCMP_OGE: return ISD::SETOGE;
case FCmpInst::FCMP_OLT: return ISD::SETOLT;
case FCmpInst::FCMP_OLE: return ISD::SETOLE;
case FCmpInst::FCMP_ONE: return ISD::SETONE;
case FCmpInst::FCMP_ORD: return ISD::SETO;
case FCmpInst::FCMP_UNO: return ISD::SETUO;
case FCmpInst::FCMP_UEQ: return ISD::SETUEQ;
case FCmpInst::FCMP_UGT: return ISD::SETUGT;
case FCmpInst::FCMP_UGE: return ISD::SETUGE;
case FCmpInst::FCMP_ULT: return ISD::SETULT;
case FCmpInst::FCMP_ULE: return ISD::SETULE;
case FCmpInst::FCMP_UNE: return ISD::SETUNE;
case FCmpInst::FCMP_TRUE: return ISD::SETTRUE;
default: break;
}
if (NoNaNsFPMath)
return FOC;
else
return FPC;
llvm_unreachable("Invalid FCmp predicate opcode!");
return ISD::SETFALSE;
}
ISD::CondCode llvm::getFCmpCodeWithoutNaN(ISD::CondCode CC) {
switch (CC) {
case ISD::SETOEQ: case ISD::SETUEQ: return ISD::SETEQ;
case ISD::SETONE: case ISD::SETUNE: return ISD::SETNE;
case ISD::SETOLT: case ISD::SETULT: return ISD::SETLT;
case ISD::SETOLE: case ISD::SETULE: return ISD::SETLE;
case ISD::SETOGT: case ISD::SETUGT: return ISD::SETGT;
case ISD::SETOGE: case ISD::SETUGE: return ISD::SETGE;
default: break;
}
return CC;
}
/// getICmpCondCode - Return the ISD condition code corresponding to
@@ -221,7 +228,8 @@ bool llvm::isInTailCallPosition(ImmutableCallSite CS, Attributes CalleeRetAttr,
// longjmp on x86), it can end up causing miscompilation that has not
// been fully understood.
if (!Ret &&
(!GuaranteedTailCallOpt || !isa<UnreachableInst>(Term))) return false;
(!TLI.getTargetMachine().Options.GuaranteedTailCallOpt ||
!isa<UnreachableInst>(Term))) return false;
// If I will have a chain, make sure no other instruction that will have a
// chain interposes between I and the return.