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[X86] Bring some better consistency to the naming of the move to/from %al/ax/eax/rax with memory offset.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225078 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -1302,62 +1302,59 @@ def MOV64mi32 : RIi32S<0xC7, MRM0m, (outs), (ins i64mem:$dst, i64i32imm:$src),
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let hasSideEffects = 0 in {
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/// moffs8, moffs16 and moffs32 versions of moves. The immediate is a
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/// 32-bit offset from the segment base. These are only valid in x86-32 mode.
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/// Memory offset versions of moves. The immediate is an address mode sized
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/// offset from the segment base.
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let SchedRW = [WriteALU] in {
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let mayLoad = 1 in {
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let Defs = [AL] in
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def MOV8o8a : Ii32<0xA0, RawFrmMemOffs, (outs), (ins offset32_8:$src),
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"mov{b}\t{$src, %al|al, $src}", [], IIC_MOV_MEM>,
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AdSize32;
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def MOV8ao32 : Ii32<0xA0, RawFrmMemOffs, (outs), (ins offset32_8:$src),
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"mov{b}\t{$src, %al|al, $src}", [], IIC_MOV_MEM>,
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AdSize32;
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let Defs = [AX] in
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def MOV16o16a : Ii32<0xA1, RawFrmMemOffs, (outs), (ins offset32_16:$src),
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def MOV16ao32 : Ii32<0xA1, RawFrmMemOffs, (outs), (ins offset32_16:$src),
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"mov{w}\t{$src, %ax|ax, $src}", [], IIC_MOV_MEM>,
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OpSize16, AdSize32;
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let Defs = [EAX] in
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def MOV32o32a : Ii32<0xA1, RawFrmMemOffs, (outs), (ins offset32_32:$src),
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def MOV32ao32 : Ii32<0xA1, RawFrmMemOffs, (outs), (ins offset32_32:$src),
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"mov{l}\t{$src, %eax|eax, $src}", [], IIC_MOV_MEM>,
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OpSize32, AdSize32;
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let Defs = [AL] in
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def MOV8o8a_16 : Ii16<0xA0, RawFrmMemOffs, (outs), (ins offset16_8:$src),
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"mov{b}\t{$src, %al|al, $src}", [], IIC_MOV_MEM>,
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AdSize16;
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def MOV8ao16 : Ii16<0xA0, RawFrmMemOffs, (outs), (ins offset16_8:$src),
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"mov{b}\t{$src, %al|al, $src}", [], IIC_MOV_MEM>, AdSize16;
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let Defs = [AX] in
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def MOV16o16a_16 : Ii16<0xA1, RawFrmMemOffs, (outs), (ins offset16_16:$src),
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"mov{w}\t{$src, %ax|ax, $src}", [], IIC_MOV_MEM>,
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OpSize16, AdSize16;
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def MOV16ao16 : Ii16<0xA1, RawFrmMemOffs, (outs), (ins offset16_16:$src),
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"mov{w}\t{$src, %ax|ax, $src}", [], IIC_MOV_MEM>,
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OpSize16, AdSize16;
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let Defs = [EAX] in
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def MOV32o32a_16 : Ii16<0xA1, RawFrmMemOffs, (outs), (ins offset16_32:$src),
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"mov{l}\t{$src, %eax|eax, $src}", [], IIC_MOV_MEM>,
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AdSize16, OpSize32;
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def MOV32ao16 : Ii16<0xA1, RawFrmMemOffs, (outs), (ins offset16_32:$src),
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"mov{l}\t{$src, %eax|eax, $src}", [], IIC_MOV_MEM>,
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AdSize16, OpSize32;
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}
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let mayStore = 1 in {
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let Uses = [AL] in
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def MOV8ao8 : Ii32<0xA2, RawFrmMemOffs, (outs offset32_8:$dst), (ins),
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"mov{b}\t{%al, $dst|$dst, al}", [], IIC_MOV_MEM>,
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AdSize32;
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def MOV8o32a : Ii32<0xA2, RawFrmMemOffs, (outs offset32_8:$dst), (ins),
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"mov{b}\t{%al, $dst|$dst, al}", [], IIC_MOV_MEM>, AdSize32;
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let Uses = [AX] in
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def MOV16ao16 : Ii32<0xA3, RawFrmMemOffs, (outs offset32_16:$dst), (ins),
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def MOV16o32a : Ii32<0xA3, RawFrmMemOffs, (outs offset32_16:$dst), (ins),
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"mov{w}\t{%ax, $dst|$dst, ax}", [], IIC_MOV_MEM>,
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OpSize16, AdSize32;
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let Uses = [EAX] in
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def MOV32ao32 : Ii32<0xA3, RawFrmMemOffs, (outs offset32_32:$dst), (ins),
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def MOV32o32a : Ii32<0xA3, RawFrmMemOffs, (outs offset32_32:$dst), (ins),
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"mov{l}\t{%eax, $dst|$dst, eax}", [], IIC_MOV_MEM>,
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OpSize32, AdSize32;
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let Uses = [AL] in
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def MOV8ao8_16 : Ii16<0xA2, RawFrmMemOffs, (outs offset16_8:$dst), (ins),
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"mov{b}\t{%al, $dst|$dst, al}", [], IIC_MOV_MEM>,
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AdSize16;
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def MOV8o16a : Ii16<0xA2, RawFrmMemOffs, (outs offset16_8:$dst), (ins),
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"mov{b}\t{%al, $dst|$dst, al}", [], IIC_MOV_MEM>, AdSize16;
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let Uses = [AX] in
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def MOV16ao16_16 : Ii16<0xA3, RawFrmMemOffs, (outs offset16_16:$dst), (ins),
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"mov{w}\t{%ax, $dst|$dst, ax}", [], IIC_MOV_MEM>,
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OpSize16, AdSize16;
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def MOV16o16a : Ii16<0xA3, RawFrmMemOffs, (outs offset16_16:$dst), (ins),
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"mov{w}\t{%ax, $dst|$dst, ax}", [], IIC_MOV_MEM>,
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OpSize16, AdSize16;
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let Uses = [EAX] in
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def MOV32ao32_16 : Ii16<0xA3, RawFrmMemOffs, (outs offset16_32:$dst), (ins),
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"mov{l}\t{%eax, $dst|$dst, eax}", [], IIC_MOV_MEM>,
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OpSize32, AdSize16;
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def MOV32o16a : Ii16<0xA3, RawFrmMemOffs, (outs offset16_32:$dst), (ins),
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"mov{l}\t{%eax, $dst|$dst, eax}", [], IIC_MOV_MEM>,
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OpSize32, AdSize16;
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}
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}
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@ -1365,33 +1362,33 @@ def MOV32ao32_16 : Ii16<0xA3, RawFrmMemOffs, (outs offset16_32:$dst), (ins),
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// and use the movabs mnemonic to indicate this specific form.
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let mayLoad = 1 in {
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let Defs = [AL] in
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def MOV64o8a : RIi64_NOREX<0xA0, RawFrmMemOffs, (outs), (ins offset64_8:$src),
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def MOV8ao64 : RIi64_NOREX<0xA0, RawFrmMemOffs, (outs), (ins offset64_8:$src),
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"movabs{b}\t{$src, %al|al, $src}", []>, AdSize64;
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let Defs = [AX] in
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def MOV64o16a : RIi64_NOREX<0xA1, RawFrmMemOffs, (outs), (ins offset64_16:$src),
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def MOV16ao64 : RIi64_NOREX<0xA1, RawFrmMemOffs, (outs), (ins offset64_16:$src),
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"movabs{w}\t{$src, %ax|ax, $src}", []>, OpSize16, AdSize64;
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let Defs = [EAX] in
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def MOV64o32a : RIi64_NOREX<0xA1, RawFrmMemOffs, (outs), (ins offset64_32:$src),
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def MOV32ao64 : RIi64_NOREX<0xA1, RawFrmMemOffs, (outs), (ins offset64_32:$src),
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"movabs{l}\t{$src, %eax|eax, $src}", []>, OpSize32,
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AdSize64;
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let Defs = [RAX] in
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def MOV64o64a : RIi64<0xA1, RawFrmMemOffs, (outs), (ins offset64_64:$src),
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def MOV64ao64 : RIi64<0xA1, RawFrmMemOffs, (outs), (ins offset64_64:$src),
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"movabs{q}\t{$src, %rax|rax, $src}", []>, AdSize64;
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}
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let mayStore = 1 in {
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let Uses = [AL] in
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def MOV64ao8 : RIi64_NOREX<0xA2, RawFrmMemOffs, (outs offset64_8:$dst), (ins),
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def MOV8o64a : RIi64_NOREX<0xA2, RawFrmMemOffs, (outs offset64_8:$dst), (ins),
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"movabs{b}\t{%al, $dst|$dst, al}", []>, AdSize64;
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let Uses = [AX] in
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def MOV64ao16 : RIi64_NOREX<0xA3, RawFrmMemOffs, (outs offset64_16:$dst), (ins),
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def MOV16o64a : RIi64_NOREX<0xA3, RawFrmMemOffs, (outs offset64_16:$dst), (ins),
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"movabs{w}\t{%ax, $dst|$dst, ax}", []>, OpSize16, AdSize64;
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let Uses = [EAX] in
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def MOV64ao32 : RIi64_NOREX<0xA3, RawFrmMemOffs, (outs offset64_32:$dst), (ins),
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def MOV32o64a : RIi64_NOREX<0xA3, RawFrmMemOffs, (outs offset64_32:$dst), (ins),
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"movabs{l}\t{%eax, $dst|$dst, eax}", []>, OpSize32,
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AdSize64;
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let Uses = [RAX] in
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def MOV64ao64 : RIi64<0xA3, RawFrmMemOffs, (outs offset64_64:$dst), (ins),
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def MOV64o64a : RIi64<0xA3, RawFrmMemOffs, (outs offset64_64:$dst), (ins),
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"movabs{q}\t{%rax, $dst|$dst, rax}", []>, AdSize64;
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}
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} // hasSideEffects = 0
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@ -624,13 +624,13 @@ ReSimplify:
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// MOV64ao8, MOV64o8a
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// XCHG16ar, XCHG32ar, XCHG64ar
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case X86::MOV8mr_NOREX:
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case X86::MOV8mr: SimplifyShortMoveForm(AsmPrinter, OutMI, X86::MOV8ao8); break;
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case X86::MOV8mr: SimplifyShortMoveForm(AsmPrinter, OutMI, X86::MOV8o32a); break;
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case X86::MOV8rm_NOREX:
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case X86::MOV8rm: SimplifyShortMoveForm(AsmPrinter, OutMI, X86::MOV8o8a); break;
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case X86::MOV16mr: SimplifyShortMoveForm(AsmPrinter, OutMI, X86::MOV16ao16); break;
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case X86::MOV16rm: SimplifyShortMoveForm(AsmPrinter, OutMI, X86::MOV16o16a); break;
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case X86::MOV32mr: SimplifyShortMoveForm(AsmPrinter, OutMI, X86::MOV32ao32); break;
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case X86::MOV32rm: SimplifyShortMoveForm(AsmPrinter, OutMI, X86::MOV32o32a); break;
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case X86::MOV8rm: SimplifyShortMoveForm(AsmPrinter, OutMI, X86::MOV8ao32); break;
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case X86::MOV16mr: SimplifyShortMoveForm(AsmPrinter, OutMI, X86::MOV16o32a); break;
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case X86::MOV16rm: SimplifyShortMoveForm(AsmPrinter, OutMI, X86::MOV16ao32); break;
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case X86::MOV32mr: SimplifyShortMoveForm(AsmPrinter, OutMI, X86::MOV32o32a); break;
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case X86::MOV32rm: SimplifyShortMoveForm(AsmPrinter, OutMI, X86::MOV32ao32); break;
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case X86::ADC8ri: SimplifyShortImmForm(OutMI, X86::ADC8i8); break;
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case X86::ADC16ri: SimplifyShortImmForm(OutMI, X86::ADC16i16); break;
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