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[x86] Rework all of the 128-bit vector shuffle tests with my handy test

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updating script so that they are more thorough and consistent.

Specific fixes here include:
- Actually test VEX-encoded AVX mnemonics.
- Actually use an SSE 4.1 run to test SSE 4.1 features!
- Correctly check instructions sequences from the start of the function.
- Elide the shuffle operands and comment designator in a consistent way.
- Test all of the architectures instead of just the ones I was motivated
  to manually author.

I've gone back through and fixed up any egregious issues I spotted. Let
me know if I missed something you really dislike.

One downside to this is that we're now not as diligently using FileCheck
variables for registers. I would be much more concerned with this if we
had larger register usage, but there just aren't that interesting of
register choices here and most of the registers are constrained by the
ABI. Ultimately, I don't think this is likely to be the maintenance
burden for these tests and updating them again should be staright
forward.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218707 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chandler Carruth 2014-09-30 21:44:34 +00:00
parent 76ff19ffa7
commit 8b6f2eee07
4 changed files with 2541 additions and 1222 deletions
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1001
test/CodeGen/X86/vector-shuffle-128-v16.ll
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609
test/CodeGen/X86/vector-shuffle-128-v2.ll
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@ -8,429 +8,613 @@ target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-unknown" target triple = "x86_64-unknown-unknown"
define <2 x i64> @shuffle_v2i64_00(<2 x i64> %a, <2 x i64> %b) { define <2 x i64> @shuffle_v2i64_00(<2 x i64> %a, <2 x i64> %b) {
; ALL-LABEL: @shuffle_v2i64_00 ; SSE-LABEL: shuffle_v2i64_00:
; ALL: pshufd {{.*}} # xmm0 = xmm0[0,1,0,1] ; SSE: # BB#0:
; ALL-NEXT: retq ; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,1,0,1]
; SSE-NEXT: retq
;
; AVX-LABEL: shuffle_v2i64_00:
; AVX: # BB#0:
; AVX-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,1,0,1]
; AVX-NEXT: retq
%shuffle = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 0, i32 0> %shuffle = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 0, i32 0>
ret <2 x i64> %shuffle ret <2 x i64> %shuffle
} }
define <2 x i64> @shuffle_v2i64_10(<2 x i64> %a, <2 x i64> %b) { define <2 x i64> @shuffle_v2i64_10(<2 x i64> %a, <2 x i64> %b) {
; ALL-LABEL: @shuffle_v2i64_10 ; SSE-LABEL: shuffle_v2i64_10:
; ALL: pshufd {{.*}} # xmm0 = xmm0[2,3,0,1] ; SSE: # BB#0:
; ALL-NEXT: retq ; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,3,0,1]
; SSE-NEXT: retq
;
; AVX-LABEL: shuffle_v2i64_10:
; AVX: # BB#0:
; AVX-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[2,3,0,1]
; AVX-NEXT: retq
%shuffle = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 1, i32 0> %shuffle = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 1, i32 0>
ret <2 x i64> %shuffle ret <2 x i64> %shuffle
} }
define <2 x i64> @shuffle_v2i64_11(<2 x i64> %a, <2 x i64> %b) { define <2 x i64> @shuffle_v2i64_11(<2 x i64> %a, <2 x i64> %b) {
; ALL-LABEL: @shuffle_v2i64_11 ; SSE-LABEL: shuffle_v2i64_11:
; ALL: pshufd {{.*}} # xmm0 = xmm0[2,3,2,3] ; SSE: # BB#0:
; ALL-NEXT: retq ; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,3,2,3]
; SSE-NEXT: retq
;
; AVX-LABEL: shuffle_v2i64_11:
; AVX: # BB#0:
; AVX-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[2,3,2,3]
; AVX-NEXT: retq
%shuffle = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 1, i32 1> %shuffle = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 1, i32 1>
ret <2 x i64> %shuffle ret <2 x i64> %shuffle
} }
define <2 x i64> @shuffle_v2i64_22(<2 x i64> %a, <2 x i64> %b) { define <2 x i64> @shuffle_v2i64_22(<2 x i64> %a, <2 x i64> %b) {
; ALL-LABEL: @shuffle_v2i64_22 ; SSE-LABEL: shuffle_v2i64_22:
; ALL: pshufd {{.*}} # xmm0 = xmm1[0,1,0,1] ; SSE: # BB#0:
; ALL-NEXT: retq ; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm1[0,1,0,1]
; SSE-NEXT: retq
;
; AVX-LABEL: shuffle_v2i64_22:
; AVX: # BB#0:
; AVX-NEXT: vpshufd {{.*#+}} xmm0 = xmm1[0,1,0,1]
; AVX-NEXT: retq
%shuffle = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 2, i32 2> %shuffle = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 2, i32 2>
ret <2 x i64> %shuffle ret <2 x i64> %shuffle
} }
define <2 x i64> @shuffle_v2i64_32(<2 x i64> %a, <2 x i64> %b) { define <2 x i64> @shuffle_v2i64_32(<2 x i64> %a, <2 x i64> %b) {
; ALL-LABEL: @shuffle_v2i64_32 ; SSE-LABEL: shuffle_v2i64_32:
; ALL: pshufd {{.*}} # xmm0 = xmm1[2,3,0,1] ; SSE: # BB#0:
; ALL-NEXT: retq ; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm1[2,3,0,1]
; SSE-NEXT: retq
;
; AVX-LABEL: shuffle_v2i64_32:
; AVX: # BB#0:
; AVX-NEXT: vpshufd {{.*#+}} xmm0 = xmm1[2,3,0,1]
; AVX-NEXT: retq
%shuffle = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 3, i32 2> %shuffle = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 3, i32 2>
ret <2 x i64> %shuffle ret <2 x i64> %shuffle
} }
define <2 x i64> @shuffle_v2i64_33(<2 x i64> %a, <2 x i64> %b) { define <2 x i64> @shuffle_v2i64_33(<2 x i64> %a, <2 x i64> %b) {
; ALL-LABEL: @shuffle_v2i64_33 ; SSE-LABEL: shuffle_v2i64_33:
; ALL: pshufd {{.*}} # xmm0 = xmm1[2,3,2,3] ; SSE: # BB#0:
; ALL-NEXT: retq ; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm1[2,3,2,3]
; SSE-NEXT: retq
;
; AVX-LABEL: shuffle_v2i64_33:
; AVX: # BB#0:
; AVX-NEXT: vpshufd {{.*#+}} xmm0 = xmm1[2,3,2,3]
; AVX-NEXT: retq
%shuffle = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 3, i32 3> %shuffle = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 3, i32 3>
ret <2 x i64> %shuffle ret <2 x i64> %shuffle
} }
define <2 x double> @shuffle_v2f64_00(<2 x double> %a, <2 x double> %b) { define <2 x double> @shuffle_v2f64_00(<2 x double> %a, <2 x double> %b) {
; SSE2-LABEL: @shuffle_v2f64_00 ; SSE2-LABEL: shuffle_v2f64_00:
; SSE2: movlhps {{.*}} # xmm0 = xmm0[0,0] ; SSE2: # BB#0:
; SSE2-NEXT: movlhps {{.*#+}} xmm0 = xmm0[0,0]
; SSE2-NEXT: retq ; SSE2-NEXT: retq
; ;
; SSE3-LABEL: @shuffle_v2f64_00 ; SSE3-LABEL: shuffle_v2f64_00:
; SSE3: unpcklpd {{.*}} # xmm0 = xmm0[0,0] ; SSE3: # BB#0:
; SSE3-NEXT: unpcklpd {{.*#+}} xmm0 = xmm0[0,0]
; SSE3-NEXT: retq ; SSE3-NEXT: retq
; ;
; SSSE3-LABEL: @shuffle_v2f64_00 ; SSSE3-LABEL: shuffle_v2f64_00:
; SSSE3: unpcklpd {{.*}} # xmm0 = xmm0[0,0] ; SSSE3: # BB#0:
; SSSE3-NEXT: unpcklpd {{.*#+}} xmm0 = xmm0[0,0]
; SSSE3-NEXT: retq ; SSSE3-NEXT: retq
; ;
; SSE41-LABEL: @shuffle_v2f64_00 ; SSE41-LABEL: shuffle_v2f64_00:
; SSE41: unpcklpd {{.*}} # xmm0 = xmm0[0,0] ; SSE41: # BB#0:
; SSE41-NEXT: unpcklpd {{.*#+}} xmm0 = xmm0[0,0]
; SSE41-NEXT: retq ; SSE41-NEXT: retq
;
; AVX-LABEL: shuffle_v2f64_00:
; AVX: # BB#0:
; AVX-NEXT: vunpcklpd {{.*#+}} xmm0 = xmm0[0,0]
; AVX-NEXT: retq
%shuffle = shufflevector <2 x double> %a, <2 x double> %b, <2 x i32> <i32 0, i32 0> %shuffle = shufflevector <2 x double> %a, <2 x double> %b, <2 x i32> <i32 0, i32 0>
ret <2 x double> %shuffle ret <2 x double> %shuffle
} }
define <2 x double> @shuffle_v2f64_10(<2 x double> %a, <2 x double> %b) { define <2 x double> @shuffle_v2f64_10(<2 x double> %a, <2 x double> %b) {
; SSE-LABEL: @shuffle_v2f64_10 ; SSE-LABEL: shuffle_v2f64_10:
; SSE: shufpd {{.*}} # xmm0 = xmm0[1,0] ; SSE: # BB#0:
; SSE-NEXT: shufpd {{.*#+}} xmm0 = xmm0[1,0]
; SSE-NEXT: retq ; SSE-NEXT: retq
; ;
; AVX-LABEL: @shuffle_v2f64_10 ; AVX-LABEL: shuffle_v2f64_10:
; AVX: vpermilpd {{.*}} # xmm0 = xmm0[1,0] ; AVX: # BB#0:
; AVX-NEXT: vpermilpd {{.*#+}} xmm0 = xmm0[1,0]
; AVX-NEXT: retq ; AVX-NEXT: retq
%shuffle = shufflevector <2 x double> %a, <2 x double> %b, <2 x i32> <i32 1, i32 0> %shuffle = shufflevector <2 x double> %a, <2 x double> %b, <2 x i32> <i32 1, i32 0>
ret <2 x double> %shuffle ret <2 x double> %shuffle
} }
define <2 x double> @shuffle_v2f64_11(<2 x double> %a, <2 x double> %b) { define <2 x double> @shuffle_v2f64_11(<2 x double> %a, <2 x double> %b) {
; ALL-LABEL: @shuffle_v2f64_11 ; SSE-LABEL: shuffle_v2f64_11:
; ALL: movhlps {{.*}} # xmm0 = xmm0[1,1] ; SSE: # BB#0:
; ALL-NEXT: retq ; SSE-NEXT: movhlps {{.*#+}} xmm0 = xmm0[1,1]
; SSE-NEXT: retq
;
; AVX-LABEL: shuffle_v2f64_11:
; AVX: # BB#0:
; AVX-NEXT: vmovhlps {{.*#+}} xmm0 = xmm0[1,1]
; AVX-NEXT: retq
%shuffle = shufflevector <2 x double> %a, <2 x double> %b, <2 x i32> <i32 1, i32 1> %shuffle = shufflevector <2 x double> %a, <2 x double> %b, <2 x i32> <i32 1, i32 1>
ret <2 x double> %shuffle ret <2 x double> %shuffle
} }
define <2 x double> @shuffle_v2f64_22(<2 x double> %a, <2 x double> %b) { define <2 x double> @shuffle_v2f64_22(<2 x double> %a, <2 x double> %b) {
; SSE2-LABEL: @shuffle_v2f64_22 ; SSE2-LABEL: shuffle_v2f64_22:
; SSE2: movlhps {{.*}} # xmm1 = xmm1[0,0] ; SSE2: # BB#0:
; SSE2-NEXT: movlhps {{.*#+}} xmm1 = xmm1[0,0]
; SSE2-NEXT: movaps %xmm1, %xmm0 ; SSE2-NEXT: movaps %xmm1, %xmm0
; SSE2-NEXT: retq ; SSE2-NEXT: retq
; ;
; SSE3-LABEL: @shuffle_v2f64_22 ; SSE3-LABEL: shuffle_v2f64_22:
; SSE3: unpcklpd {{.*}} # xmm1 = xmm1[0,0] ; SSE3: # BB#0:
; SSE3-NEXT: unpcklpd {{.*#+}} xmm1 = xmm1[0,0]
; SSE3-NEXT: movapd %xmm1, %xmm0 ; SSE3-NEXT: movapd %xmm1, %xmm0
; SSE3-NEXT: retq ; SSE3-NEXT: retq
; ;
; SSSE3-LABEL: @shuffle_v2f64_22 ; SSSE3-LABEL: shuffle_v2f64_22:
; SSSE3: unpcklpd {{.*}} # xmm1 = xmm1[0,0] ; SSSE3: # BB#0:
; SSSE3-NEXT: unpcklpd {{.*#+}} xmm1 = xmm1[0,0]
; SSSE3-NEXT: movapd %xmm1, %xmm0 ; SSSE3-NEXT: movapd %xmm1, %xmm0
; SSSE3-NEXT: retq ; SSSE3-NEXT: retq
; ;
; SSE41-LABEL: @shuffle_v2f64_22 ; SSE41-LABEL: shuffle_v2f64_22:
; SSE41: unpcklpd {{.*}} # xmm1 = xmm1[0,0] ; SSE41: # BB#0:
; SSE41-NEXT: unpcklpd {{.*#+}} xmm1 = xmm1[0,0]
; SSE41-NEXT: movapd %xmm1, %xmm0 ; SSE41-NEXT: movapd %xmm1, %xmm0
; SSE41-NEXT: retq ; SSE41-NEXT: retq
;
; AVX-LABEL: shuffle_v2f64_22:
; AVX: # BB#0:
; AVX-NEXT: vunpcklpd {{.*#+}} xmm0 = xmm1[0,0]
; AVX-NEXT: retq
%shuffle = shufflevector <2 x double> %a, <2 x double> %b, <2 x i32> <i32 2, i32 2> %shuffle = shufflevector <2 x double> %a, <2 x double> %b, <2 x i32> <i32 2, i32 2>
ret <2 x double> %shuffle ret <2 x double> %shuffle
} }
define <2 x double> @shuffle_v2f64_32(<2 x double> %a, <2 x double> %b) { define <2 x double> @shuffle_v2f64_32(<2 x double> %a, <2 x double> %b) {
; SSE-LABEL: @shuffle_v2f64_32 ; SSE-LABEL: shuffle_v2f64_32:
; SSE: pshufd {{.*}} # xmm0 = xmm1[2,3,0,1] ; SSE: # BB#0:
; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm1[2,3,0,1]
; SSE-NEXT: retq ; SSE-NEXT: retq
; ;
; AVX-LABEL: @shuffle_v2f64_32 ; AVX-LABEL: shuffle_v2f64_32:
; AVX: vpermilpd {{.*}} # xmm0 = xmm1[1,0] ; AVX: # BB#0:
; AVX-NEXT: vpermilpd {{.*#+}} xmm0 = xmm1[1,0]
; AVX-NEXT: retq ; AVX-NEXT: retq
%shuffle = shufflevector <2 x double> %a, <2 x double> %b, <2 x i32> <i32 3, i32 2> %shuffle = shufflevector <2 x double> %a, <2 x double> %b, <2 x i32> <i32 3, i32 2>
ret <2 x double> %shuffle ret <2 x double> %shuffle
} }
define <2 x double> @shuffle_v2f64_33(<2 x double> %a, <2 x double> %b) { define <2 x double> @shuffle_v2f64_33(<2 x double> %a, <2 x double> %b) {
; SSE-LABEL: @shuffle_v2f64_33 ; SSE-LABEL: shuffle_v2f64_33:
; SSE: movhlps {{.*}} # xmm1 = xmm1[1,1] ; SSE: # BB#0:
; SSE-NEXT: movhlps {{.*#+}} xmm1 = xmm1[1,1]
; SSE-NEXT: movaps %xmm1, %xmm0 ; SSE-NEXT: movaps %xmm1, %xmm0
; SSE-NEXT: retq ; SSE-NEXT: retq
; ;
; AVX-LABEL: @shuffle_v2f64_33 ; AVX-LABEL: shuffle_v2f64_33:
; AVX: vmovhlps {{.*}} # xmm0 = xmm1[1,1] ; AVX: # BB#0:
; AVX-NEXT: vmovhlps {{.*#+}} xmm0 = xmm1[1,1]
; AVX-NEXT: retq ; AVX-NEXT: retq
%shuffle = shufflevector <2 x double> %a, <2 x double> %b, <2 x i32> <i32 3, i32 3> %shuffle = shufflevector <2 x double> %a, <2 x double> %b, <2 x i32> <i32 3, i32 3>
ret <2 x double> %shuffle ret <2 x double> %shuffle
} }
define <2 x double> @shuffle_v2f64_03(<2 x double> %a, <2 x double> %b) { define <2 x double> @shuffle_v2f64_03(<2 x double> %a, <2 x double> %b) {
; SSE2-LABEL: @shuffle_v2f64_03 ; SSE2-LABEL: shuffle_v2f64_03:
; SSE2: shufpd {{.*}} # xmm0 = xmm0[0],xmm1[1] ; SSE2: # BB#0:
; SSE2-NEXT: shufpd {{.*#+}} xmm0 = xmm0[0],xmm1[1]
; SSE2-NEXT: retq ; SSE2-NEXT: retq
; ;
; SSE3-LABEL: @shuffle_v2f64_03 ; SSE3-LABEL: shuffle_v2f64_03:
; SSE3: shufpd {{.*}} # xmm0 = xmm0[0],xmm1[1] ; SSE3: # BB#0:
; SSE3-NEXT: shufpd {{.*#+}} xmm0 = xmm0[0],xmm1[1]
; SSE3-NEXT: retq ; SSE3-NEXT: retq
; ;
; SSSE3-LABEL: @shuffle_v2f64_03 ; SSSE3-LABEL: shuffle_v2f64_03:
; SSSE3: shufpd {{.*}} # xmm0 = xmm0[0],xmm1[1] ; SSSE3: # BB#0:
; SSSE3-NEXT: shufpd {{.*#+}} xmm0 = xmm0[0],xmm1[1]
; SSSE3-NEXT: retq ; SSSE3-NEXT: retq
; ;
; SSE41-LABEL: @shuffle_v2f64_03 ; SSE41-LABEL: shuffle_v2f64_03:
; SSE41: blendpd {{.*}} # xmm0 = xmm0[0],xmm1[1] ; SSE41: # BB#0:
; SSE41-NEXT: blendpd {{.*#+}} xmm0 = xmm0[0],xmm1[1]
; SSE41-NEXT: retq ; SSE41-NEXT: retq
;
; AVX-LABEL: shuffle_v2f64_03:
; AVX: # BB#0:
; AVX-NEXT: vblendpd {{.*#+}} xmm0 = xmm0[0],xmm1[1]
; AVX-NEXT: retq
%shuffle = shufflevector <2 x double> %a, <2 x double> %b, <2 x i32> <i32 0, i32 3> %shuffle = shufflevector <2 x double> %a, <2 x double> %b, <2 x i32> <i32 0, i32 3>
ret <2 x double> %shuffle ret <2 x double> %shuffle
} }
define <2 x double> @shuffle_v2f64_21(<2 x double> %a, <2 x double> %b) { define <2 x double> @shuffle_v2f64_21(<2 x double> %a, <2 x double> %b) {
; SSE2-LABEL: @shuffle_v2f64_21 ; SSE2-LABEL: shuffle_v2f64_21:
; SSE2: shufpd {{.*}} # xmm1 = xmm1[0],xmm0[1] ; SSE2: # BB#0:
; SSE2-NEXT: shufpd {{.*#+}} xmm1 = xmm1[0],xmm0[1]
; SSE2-NEXT: movapd %xmm1, %xmm0 ; SSE2-NEXT: movapd %xmm1, %xmm0
; SSE2-NEXT: retq ; SSE2-NEXT: retq
; ;
; SSE3-LABEL: @shuffle_v2f64_21 ; SSE3-LABEL: shuffle_v2f64_21:
; SSE3: shufpd {{.*}} # xmm1 = xmm1[0],xmm0[1] ; SSE3: # BB#0:
; SSE3-NEXT: shufpd {{.*#+}} xmm1 = xmm1[0],xmm0[1]
; SSE3-NEXT: movapd %xmm1, %xmm0 ; SSE3-NEXT: movapd %xmm1, %xmm0
; SSE3-NEXT: retq ; SSE3-NEXT: retq
; ;
; SSSE3-LABEL: @shuffle_v2f64_21 ; SSSE3-LABEL: shuffle_v2f64_21:
; SSSE3: shufpd {{.*}} # xmm1 = xmm1[0],xmm0[1] ; SSSE3: # BB#0:
; SSSE3-NEXT: shufpd {{.*#+}} xmm1 = xmm1[0],xmm0[1]
; SSSE3-NEXT: movapd %xmm1, %xmm0 ; SSSE3-NEXT: movapd %xmm1, %xmm0
; SSSE3-NEXT: retq ; SSSE3-NEXT: retq
; ;
; SSE41-LABEL: @shuffle_v2f64_21 ; SSE41-LABEL: shuffle_v2f64_21:
; SSE41: blendpd {{.*}} # xmm1 = xmm1[0],xmm0[1] ; SSE41: # BB#0:
; SSE41-NEXT: blendpd {{.*#+}} xmm1 = xmm1[0],xmm0[1]
; SSE41-NEXT: movapd %xmm1, %xmm0 ; SSE41-NEXT: movapd %xmm1, %xmm0
; SSE41-NEXT: retq ; SSE41-NEXT: retq
;
; AVX-LABEL: shuffle_v2f64_21:
; AVX: # BB#0:
; AVX-NEXT: vblendpd {{.*#+}} xmm0 = xmm1[0],xmm0[1]
; AVX-NEXT: retq
%shuffle = shufflevector <2 x double> %a, <2 x double> %b, <2 x i32> <i32 2, i32 1> %shuffle = shufflevector <2 x double> %a, <2 x double> %b, <2 x i32> <i32 2, i32 1>
ret <2 x double> %shuffle ret <2 x double> %shuffle
} }
define <2 x i64> @shuffle_v2i64_02(<2 x i64> %a, <2 x i64> %b) { define <2 x i64> @shuffle_v2i64_02(<2 x i64> %a, <2 x i64> %b) {
; ALL-LABEL: @shuffle_v2i64_02 ; SSE-LABEL: shuffle_v2i64_02:
; ALL: punpcklqdq {{.*}} # xmm0 = xmm0[0],xmm1[0] ; SSE: # BB#0:
; ALL-NEXT: retq ; SSE-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
; SSE-NEXT: retq
;
; AVX-LABEL: shuffle_v2i64_02:
; AVX: # BB#0:
; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
; AVX-NEXT: retq
%shuffle = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 0, i32 2> %shuffle = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 0, i32 2>
ret <2 x i64> %shuffle ret <2 x i64> %shuffle
} }
define <2 x i64> @shuffle_v2i64_02_copy(<2 x i64> %nonce, <2 x i64> %a, <2 x i64> %b) { define <2 x i64> @shuffle_v2i64_02_copy(<2 x i64> %nonce, <2 x i64> %a, <2 x i64> %b) {
; SSE-LABEL: @shuffle_v2i64_02_copy ; SSE-LABEL: shuffle_v2i64_02_copy:
; SSE: punpcklqdq {{.*}} # xmm1 = xmm1[0],xmm2[0] ; SSE: # BB#0:
; SSE-NEXT: punpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm2[0]
; SSE-NEXT: movdqa %xmm1, %xmm0 ; SSE-NEXT: movdqa %xmm1, %xmm0
; SSE-NEXT: retq ; SSE-NEXT: retq
; ;
; AVX-LABEL: @shuffle_v2i64_02_copy ; AVX-LABEL: shuffle_v2i64_02_copy:
; AVX: punpcklqdq {{.*}} # xmm0 = xmm1[0],xmm2[0] ; AVX: # BB#0:
; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm2[0]
; AVX-NEXT: retq ; AVX-NEXT: retq
%shuffle = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 0, i32 2> %shuffle = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 0, i32 2>
ret <2 x i64> %shuffle ret <2 x i64> %shuffle
} }
define <2 x i64> @shuffle_v2i64_03(<2 x i64> %a, <2 x i64> %b) { define <2 x i64> @shuffle_v2i64_03(<2 x i64> %a, <2 x i64> %b) {
; SSE2-LABEL: @shuffle_v2i64_03 ; SSE2-LABEL: shuffle_v2i64_03:
; SSE2: shufpd {{.*}} # xmm0 = xmm0[0],xmm1[1] ; SSE2: # BB#0:
; SSE2-NEXT: shufpd {{.*#+}} xmm0 = xmm0[0],xmm1[1]
; SSE2-NEXT: retq ; SSE2-NEXT: retq
; ;
; SSE3-LABEL: @shuffle_v2i64_03 ; SSE3-LABEL: shuffle_v2i64_03:
; SSE3: shufpd {{.*}} # xmm0 = xmm0[0],xmm1[1] ; SSE3: # BB#0:
; SSE3-NEXT: shufpd {{.*#+}} xmm0 = xmm0[0],xmm1[1]
; SSE3-NEXT: retq ; SSE3-NEXT: retq
; ;
; SSSE3-LABEL: @shuffle_v2i64_03 ; SSSE3-LABEL: shuffle_v2i64_03:
; SSSE3: shufpd {{.*}} # xmm0 = xmm0[0],xmm1[1] ; SSSE3: # BB#0:
; SSSE3-NEXT: shufpd {{.*#+}} xmm0 = xmm0[0],xmm1[1]
; SSSE3-NEXT: retq ; SSSE3-NEXT: retq
; ;
; SSE41-LABEL: @shuffle_v2i64_03 ; SSE41-LABEL: shuffle_v2i64_03:
; SSE41: pblendw {{.*}} # xmm0 = xmm0[0,1,2,3],xmm1[4,5,6,7] ; SSE41: # BB#0:
; SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0,1,2,3],xmm1[4,5,6,7]
; SSE41-NEXT: retq ; SSE41-NEXT: retq
;
; AVX-LABEL: shuffle_v2i64_03:
; AVX: # BB#0:
; AVX-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1,2,3],xmm1[4,5,6,7]
; AVX-NEXT: retq
%shuffle = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 0, i32 3> %shuffle = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 0, i32 3>
ret <2 x i64> %shuffle ret <2 x i64> %shuffle
} }
define <2 x i64> @shuffle_v2i64_03_copy(<2 x i64> %nonce, <2 x i64> %a, <2 x i64> %b) { define <2 x i64> @shuffle_v2i64_03_copy(<2 x i64> %nonce, <2 x i64> %a, <2 x i64> %b) {
; SSE2-LABEL: @shuffle_v2i64_03_copy ; SSE2-LABEL: shuffle_v2i64_03_copy:
; SSE2: shufpd {{.*}} # xmm1 = xmm1[0],xmm2[1] ; SSE2: # BB#0:
; SSE2-NEXT: shufpd {{.*#+}} xmm1 = xmm1[0],xmm2[1]
; SSE2-NEXT: movapd %xmm1, %xmm0 ; SSE2-NEXT: movapd %xmm1, %xmm0
; SSE2-NEXT: retq ; SSE2-NEXT: retq
; ;
; SSE3-LABEL: @shuffle_v2i64_03_copy ; SSE3-LABEL: shuffle_v2i64_03_copy:
; SSE3: shufpd {{.*}} # xmm1 = xmm1[0],xmm2[1] ; SSE3: # BB#0:
; SSE3-NEXT: shufpd {{.*#+}} xmm1 = xmm1[0],xmm2[1]
; SSE3-NEXT: movapd %xmm1, %xmm0 ; SSE3-NEXT: movapd %xmm1, %xmm0
; SSE3-NEXT: retq ; SSE3-NEXT: retq
; ;
; SSSE3-LABEL: @shuffle_v2i64_03_copy ; SSSE3-LABEL: shuffle_v2i64_03_copy:
; SSSE3: shufpd {{.*}} # xmm1 = xmm1[0],xmm2[1] ; SSSE3: # BB#0:
; SSSE3-NEXT: shufpd {{.*#+}} xmm1 = xmm1[0],xmm2[1]
; SSSE3-NEXT: movapd %xmm1, %xmm0 ; SSSE3-NEXT: movapd %xmm1, %xmm0
; SSSE3-NEXT: retq ; SSSE3-NEXT: retq
; ;
; SSE41-LABEL: @shuffle_v2i64_03_copy ; SSE41-LABEL: shuffle_v2i64_03_copy:
; SSE41: pblendw {{.*}} # xmm1 = xmm1[0,1,2,3],xmm2[4,5,6,7] ; SSE41: # BB#0:
; SSE41-NEXT: pblendw {{.*#+}} xmm1 = xmm1[0,1,2,3],xmm2[4,5,6,7]
; SSE41-NEXT: movdqa %xmm1, %xmm0 ; SSE41-NEXT: movdqa %xmm1, %xmm0
; SSE41-NEXT: retq ; SSE41-NEXT: retq
;
; AVX-LABEL: shuffle_v2i64_03_copy:
; AVX: # BB#0:
; AVX-NEXT: vpblendw {{.*#+}} xmm0 = xmm1[0,1,2,3],xmm2[4,5,6,7]
; AVX-NEXT: retq
%shuffle = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 0, i32 3> %shuffle = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 0, i32 3>
ret <2 x i64> %shuffle ret <2 x i64> %shuffle
} }
define <2 x i64> @shuffle_v2i64_12(<2 x i64> %a, <2 x i64> %b) { define <2 x i64> @shuffle_v2i64_12(<2 x i64> %a, <2 x i64> %b) {
; SSE2-LABEL: @shuffle_v2i64_12 ; SSE2-LABEL: shuffle_v2i64_12:
; SSE2: shufpd {{.*}} # xmm0 = xmm0[1],xmm1[0] ; SSE2: # BB#0:
; SSE2-NEXT: shufpd {{.*#+}} xmm0 = xmm0[1],xmm1[0]
; SSE2-NEXT: retq ; SSE2-NEXT: retq
; ;
; SSE3-LABEL: @shuffle_v2i64_12 ; SSE3-LABEL: shuffle_v2i64_12:
; SSE3: shufpd {{.*}} # xmm0 = xmm0[1],xmm1[0] ; SSE3: # BB#0:
; SSE3-NEXT: shufpd {{.*#+}} xmm0 = xmm0[1],xmm1[0]
; SSE3-NEXT: retq ; SSE3-NEXT: retq
; ;
; SSSE3-LABEL: @shuffle_v2i64_12 ; SSSE3-LABEL: shuffle_v2i64_12:
; SSSE3: palignr {{.*}} # xmm1 = xmm0[8,9,10,11,12,13,14,15],xmm1[0,1,2,3,4,5,6,7] ; SSSE3: # BB#0:
; SSSE3-NEXT: palignr {{.*#+}} xmm1 = xmm0[8,9,10,11,12,13,14,15],xmm1[0,1,2,3,4,5,6,7]
; SSSE3-NEXT: movdqa %xmm1, %xmm0 ; SSSE3-NEXT: movdqa %xmm1, %xmm0
; SSSE3-NEXT: retq ; SSSE3-NEXT: retq
; ;
; SSE41-LABEL: @shuffle_v2i64_12 ; SSE41-LABEL: shuffle_v2i64_12:
; SSE41: palignr {{.*}} # xmm1 = xmm0[8,9,10,11,12,13,14,15],xmm1[0,1,2,3,4,5,6,7] ; SSE41: # BB#0:
; SSE41-NEXT: palignr {{.*#+}} xmm1 = xmm0[8,9,10,11,12,13,14,15],xmm1[0,1,2,3,4,5,6,7]
; SSE41-NEXT: movdqa %xmm1, %xmm0 ; SSE41-NEXT: movdqa %xmm1, %xmm0
; SSE41-NEXT: retq ; SSE41-NEXT: retq
;
; AVX-LABEL: shuffle_v2i64_12:
; AVX: # BB#0:
; AVX-NEXT: vpalignr {{.*#+}} xmm0 = xmm0[8,9,10,11,12,13,14,15],xmm1[0,1,2,3,4,5,6,7]
; AVX-NEXT: retq
%shuffle = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 1, i32 2> %shuffle = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 1, i32 2>
ret <2 x i64> %shuffle ret <2 x i64> %shuffle
} }
define <2 x i64> @shuffle_v2i64_12_copy(<2 x i64> %nonce, <2 x i64> %a, <2 x i64> %b) { define <2 x i64> @shuffle_v2i64_12_copy(<2 x i64> %nonce, <2 x i64> %a, <2 x i64> %b) {
; SSE2-LABEL: @shuffle_v2i64_12_copy ; SSE2-LABEL: shuffle_v2i64_12_copy:
; SSE2: shufpd {{.*}} # xmm1 = xmm1[1],xmm2[0] ; SSE2: # BB#0:
; SSE2-NEXT: shufpd {{.*#+}} xmm1 = xmm1[1],xmm2[0]
; SSE2-NEXT: movapd %xmm1, %xmm0 ; SSE2-NEXT: movapd %xmm1, %xmm0
; SSE2-NEXT: retq ; SSE2-NEXT: retq
; ;
; SSE3-LABEL: @shuffle_v2i64_12_copy ; SSE3-LABEL: shuffle_v2i64_12_copy:
; SSE3: shufpd {{.*}} # xmm1 = xmm1[1],xmm2[0] ; SSE3: # BB#0:
; SSE3-NEXT: shufpd {{.*#+}} xmm1 = xmm1[1],xmm2[0]
; SSE3-NEXT: movapd %xmm1, %xmm0 ; SSE3-NEXT: movapd %xmm1, %xmm0
; SSE3-NEXT: retq ; SSE3-NEXT: retq
; ;
; SSSE3-LABEL: @shuffle_v2i64_12_copy ; SSSE3-LABEL: shuffle_v2i64_12_copy:
; SSSE3: palignr {{.*}} # xmm2 = xmm1[8,9,10,11,12,13,14,15],xmm2[0,1,2,3,4,5,6,7] ; SSSE3: # BB#0:
; SSSE3-NEXT: palignr {{.*#+}} xmm2 = xmm1[8,9,10,11,12,13,14,15],xmm2[0,1,2,3,4,5,6,7]
; SSSE3-NEXT: movdqa %xmm2, %xmm0 ; SSSE3-NEXT: movdqa %xmm2, %xmm0
; SSSE3-NEXT: retq ; SSSE3-NEXT: retq
; ;
; SSE41-LABEL: @shuffle_v2i64_12_copy ; SSE41-LABEL: shuffle_v2i64_12_copy:
; SSE41: palignr {{.*}} # xmm2 = xmm1[8,9,10,11,12,13,14,15],xmm2[0,1,2,3,4,5,6,7] ; SSE41: # BB#0:
; SSE41-NEXT: palignr {{.*#+}} xmm2 = xmm1[8,9,10,11,12,13,14,15],xmm2[0,1,2,3,4,5,6,7]
; SSE41-NEXT: movdqa %xmm2, %xmm0 ; SSE41-NEXT: movdqa %xmm2, %xmm0
; SSE41-NEXT: retq ; SSE41-NEXT: retq
;
; AVX-LABEL: shuffle_v2i64_12_copy:
; AVX: # BB#0:
; AVX-NEXT: vpalignr {{.*#+}} xmm0 = xmm1[8,9,10,11,12,13,14,15],xmm2[0,1,2,3,4,5,6,7]
; AVX-NEXT: retq
%shuffle = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 1, i32 2> %shuffle = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 1, i32 2>
ret <2 x i64> %shuffle ret <2 x i64> %shuffle
} }
define <2 x i64> @shuffle_v2i64_13(<2 x i64> %a, <2 x i64> %b) { define <2 x i64> @shuffle_v2i64_13(<2 x i64> %a, <2 x i64> %b) {
; ALL-LABEL: @shuffle_v2i64_13 ; SSE-LABEL: shuffle_v2i64_13:
; ALL: punpckhqdq {{.*}} # xmm0 = xmm0[1],xmm1[1] ; SSE: # BB#0:
; ALL-NEXT: retq ; SSE-NEXT: punpckhqdq {{.*#+}} xmm0 = xmm0[1],xmm1[1]
; SSE-NEXT: retq
;
; AVX-LABEL: shuffle_v2i64_13:
; AVX: # BB#0:
; AVX-NEXT: vpunpckhqdq {{.*#+}} xmm0 = xmm0[1],xmm1[1]
; AVX-NEXT: retq
%shuffle = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 1, i32 3> %shuffle = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 1, i32 3>
ret <2 x i64> %shuffle ret <2 x i64> %shuffle
} }
define <2 x i64> @shuffle_v2i64_13_copy(<2 x i64> %nonce, <2 x i64> %a, <2 x i64> %b) { define <2 x i64> @shuffle_v2i64_13_copy(<2 x i64> %nonce, <2 x i64> %a, <2 x i64> %b) {
; SSE-LABEL: @shuffle_v2i64_13_copy ; SSE-LABEL: shuffle_v2i64_13_copy:
; SSE: punpckhqdq {{.*}} # xmm1 = xmm1[1],xmm2[1] ; SSE: # BB#0:
; SSE-NEXT: punpckhqdq {{.*#+}} xmm1 = xmm1[1],xmm2[1]
; SSE-NEXT: movdqa %xmm1, %xmm0 ; SSE-NEXT: movdqa %xmm1, %xmm0
; SSE-NEXT: retq ; SSE-NEXT: retq
; ;
; AVX-LABEL: @shuffle_v2i64_13_copy ; AVX-LABEL: shuffle_v2i64_13_copy:
; AVX: punpckhqdq {{.*}} # xmm0 = xmm1[1],xmm2[1] ; AVX: # BB#0:
; AVX-NEXT: vpunpckhqdq {{.*#+}} xmm0 = xmm1[1],xmm2[1]
; AVX-NEXT: retq ; AVX-NEXT: retq
%shuffle = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 1, i32 3> %shuffle = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 1, i32 3>
ret <2 x i64> %shuffle ret <2 x i64> %shuffle
} }
define <2 x i64> @shuffle_v2i64_20(<2 x i64> %a, <2 x i64> %b) { define <2 x i64> @shuffle_v2i64_20(<2 x i64> %a, <2 x i64> %b) {
; SSE-LABEL: @shuffle_v2i64_20 ; SSE-LABEL: shuffle_v2i64_20:
; SSE: punpcklqdq {{.*}} # xmm1 = xmm1[0],xmm0[0] ; SSE: # BB#0:
; SSE-NEXT: punpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm0[0]
; SSE-NEXT: movdqa %xmm1, %xmm0 ; SSE-NEXT: movdqa %xmm1, %xmm0
; SSE-NEXT: retq ; SSE-NEXT: retq
; ;
; AVX-LABEL: @shuffle_v2i64_20 ; AVX-LABEL: shuffle_v2i64_20:
; AVX: vpunpcklqdq {{.*}} # xmm0 = xmm1[0],xmm0[0] ; AVX: # BB#0:
; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0]
; AVX-NEXT: retq ; AVX-NEXT: retq
%shuffle = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 2, i32 0> %shuffle = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 2, i32 0>
ret <2 x i64> %shuffle ret <2 x i64> %shuffle
} }
define <2 x i64> @shuffle_v2i64_20_copy(<2 x i64> %nonce, <2 x i64> %a, <2 x i64> %b) { define <2 x i64> @shuffle_v2i64_20_copy(<2 x i64> %nonce, <2 x i64> %a, <2 x i64> %b) {
; SSE-LABEL: @shuffle_v2i64_20_copy ; SSE-LABEL: shuffle_v2i64_20_copy:
; SSE: punpcklqdq {{.*}} # xmm2 = xmm2[0],xmm1[0] ; SSE: # BB#0:
; SSE-NEXT: punpcklqdq {{.*#+}} xmm2 = xmm2[0],xmm1[0]
; SSE-NEXT: movdqa %xmm2, %xmm0 ; SSE-NEXT: movdqa %xmm2, %xmm0
; SSE-NEXT: retq ; SSE-NEXT: retq
; ;
; AVX-LABEL: @shuffle_v2i64_20_copy ; AVX-LABEL: shuffle_v2i64_20_copy:
; AVX: vpunpcklqdq {{.*}} # xmm0 = xmm2[0],xmm1[0] ; AVX: # BB#0:
; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm2[0],xmm1[0]
; AVX-NEXT: retq ; AVX-NEXT: retq
%shuffle = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 2, i32 0> %shuffle = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 2, i32 0>
ret <2 x i64> %shuffle ret <2 x i64> %shuffle
} }
define <2 x i64> @shuffle_v2i64_21(<2 x i64> %a, <2 x i64> %b) { define <2 x i64> @shuffle_v2i64_21(<2 x i64> %a, <2 x i64> %b) {
; SSE2-LABEL: @shuffle_v2i64_21 ; SSE2-LABEL: shuffle_v2i64_21:
; SSE2: shufpd {{.*}} # xmm1 = xmm1[0],xmm0[1] ; SSE2: # BB#0:
; SSE2-NEXT: shufpd {{.*#+}} xmm1 = xmm1[0],xmm0[1]
; SSE2-NEXT: movapd %xmm1, %xmm0 ; SSE2-NEXT: movapd %xmm1, %xmm0
; SSE2-NEXT: retq ; SSE2-NEXT: retq
; ;
; SSE3-LABEL: @shuffle_v2i64_21 ; SSE3-LABEL: shuffle_v2i64_21:
; SSE3: shufpd {{.*}} # xmm1 = xmm1[0],xmm0[1] ; SSE3: # BB#0:
; SSE3-NEXT: shufpd {{.*#+}} xmm1 = xmm1[0],xmm0[1]
; SSE3-NEXT: movapd %xmm1, %xmm0 ; SSE3-NEXT: movapd %xmm1, %xmm0
; SSE3-NEXT: retq ; SSE3-NEXT: retq
; ;
; SSSE3-LABEL: @shuffle_v2i64_21 ; SSSE3-LABEL: shuffle_v2i64_21:
; SSSE3: shufpd {{.*}} # xmm1 = xmm1[0],xmm0[1] ; SSSE3: # BB#0:
; SSSE3-NEXT: shufpd {{.*#+}} xmm1 = xmm1[0],xmm0[1]
; SSSE3-NEXT: movapd %xmm1, %xmm0 ; SSSE3-NEXT: movapd %xmm1, %xmm0
; SSSE3-NEXT: retq ; SSSE3-NEXT: retq
; ;
; SSE41-LABEL: @shuffle_v2i64_21 ; SSE41-LABEL: shuffle_v2i64_21:
; SSE41: pblendw {{.*}} # xmm1 = xmm1[0,1,2,3],xmm0[4,5,6,7] ; SSE41: # BB#0:
; SSE41-NEXT: pblendw {{.*#+}} xmm1 = xmm1[0,1,2,3],xmm0[4,5,6,7]
; SSE41-NEXT: movdqa %xmm1, %xmm0 ; SSE41-NEXT: movdqa %xmm1, %xmm0
; SSE41-NEXT: retq ; SSE41-NEXT: retq
;
; AVX-LABEL: shuffle_v2i64_21:
; AVX: # BB#0:
; AVX-NEXT: vpblendw {{.*#+}} xmm0 = xmm1[0,1,2,3],xmm0[4,5,6,7]
; AVX-NEXT: retq
%shuffle = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 2, i32 1> %shuffle = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 2, i32 1>
ret <2 x i64> %shuffle ret <2 x i64> %shuffle
} }
define <2 x i64> @shuffle_v2i64_21_copy(<2 x i64> %nonce, <2 x i64> %a, <2 x i64> %b) { define <2 x i64> @shuffle_v2i64_21_copy(<2 x i64> %nonce, <2 x i64> %a, <2 x i64> %b) {
; SSE2-LABEL: @shuffle_v2i64_21_copy ; SSE2-LABEL: shuffle_v2i64_21_copy:
; SSE2: shufpd {{.*}} # xmm2 = xmm2[0],xmm1[1] ; SSE2: # BB#0:
; SSE2-NEXT: shufpd {{.*#+}} xmm2 = xmm2[0],xmm1[1]
; SSE2-NEXT: movapd %xmm2, %xmm0 ; SSE2-NEXT: movapd %xmm2, %xmm0
; SSE2-NEXT: retq ; SSE2-NEXT: retq
; ;
; SSE3-LABEL: @shuffle_v2i64_21_copy ; SSE3-LABEL: shuffle_v2i64_21_copy:
; SSE3: shufpd {{.*}} # xmm2 = xmm2[0],xmm1[1] ; SSE3: # BB#0:
; SSE3-NEXT: shufpd {{.*#+}} xmm2 = xmm2[0],xmm1[1]
; SSE3-NEXT: movapd %xmm2, %xmm0 ; SSE3-NEXT: movapd %xmm2, %xmm0
; SSE3-NEXT: retq ; SSE3-NEXT: retq
; ;
; SSSE3-LABEL: @shuffle_v2i64_21_copy ; SSSE3-LABEL: shuffle_v2i64_21_copy:
; SSSE3: shufpd {{.*}} # xmm2 = xmm2[0],xmm1[1] ; SSSE3: # BB#0:
; SSSE3-NEXT: shufpd {{.*#+}} xmm2 = xmm2[0],xmm1[1]
; SSSE3-NEXT: movapd %xmm2, %xmm0 ; SSSE3-NEXT: movapd %xmm2, %xmm0
; SSSE3-NEXT: retq ; SSSE3-NEXT: retq
; ;
; SSE41-LABEL: @shuffle_v2i64_21_copy ; SSE41-LABEL: shuffle_v2i64_21_copy:
; SSE41: pblendw {{.*}} # xmm2 = xmm2[0,1,2,3],xmm1[4,5,6,7] ; SSE41: # BB#0:
; SSE41-NEXT: pblendw {{.*#+}} xmm2 = xmm2[0,1,2,3],xmm1[4,5,6,7]
; SSE41-NEXT: movdqa %xmm2, %xmm0 ; SSE41-NEXT: movdqa %xmm2, %xmm0
; SSE41-NEXT: retq ; SSE41-NEXT: retq
;
; AVX-LABEL: shuffle_v2i64_21_copy:
; AVX: # BB#0:
; AVX-NEXT: vpblendw {{.*#+}} xmm0 = xmm2[0,1,2,3],xmm1[4,5,6,7]
; AVX-NEXT: retq
%shuffle = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 2, i32 1> %shuffle = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 2, i32 1>
ret <2 x i64> %shuffle ret <2 x i64> %shuffle
} }
define <2 x i64> @shuffle_v2i64_30(<2 x i64> %a, <2 x i64> %b) { define <2 x i64> @shuffle_v2i64_30(<2 x i64> %a, <2 x i64> %b) {
; SSE2-LABEL: @shuffle_v2i64_30 ; SSE2-LABEL: shuffle_v2i64_30:
; SSE2: shufpd {{.*}} # xmm1 = xmm1[1],xmm0[0] ; SSE2: # BB#0:
; SSE2-NEXT: shufpd {{.*#+}} xmm1 = xmm1[1],xmm0[0]
; SSE2-NEXT: movapd %xmm1, %xmm0 ; SSE2-NEXT: movapd %xmm1, %xmm0
; SSE2-NEXT: retq ; SSE2-NEXT: retq
; ;
; SSE3-LABEL: @shuffle_v2i64_30 ; SSE3-LABEL: shuffle_v2i64_30:
; SSE3: shufpd {{.*}} # xmm1 = xmm1[1],xmm0[0] ; SSE3: # BB#0:
; SSE3-NEXT: shufpd {{.*#+}} xmm1 = xmm1[1],xmm0[0]
; SSE3-NEXT: movapd %xmm1, %xmm0 ; SSE3-NEXT: movapd %xmm1, %xmm0
; SSE3-NEXT: retq ; SSE3-NEXT: retq
; ;
; SSSE3-LABEL: @shuffle_v2i64_30 ; SSSE3-LABEL: shuffle_v2i64_30:
; SSSE3: palignr {{.*}} # xmm0 = xmm1[8,9,10,11,12,13,14,15],xmm0[0,1,2,3,4,5,6,7] ; SSSE3: # BB#0:
; SSSE3-NEXT: palignr {{.*#+}} xmm0 = xmm1[8,9,10,11,12,13,14,15],xmm0[0,1,2,3,4,5,6,7]
; SSSE3-NEXT: retq ; SSSE3-NEXT: retq
;
; SSE41-LABEL: shuffle_v2i64_30:
; SSE41: # BB#0:
; SSE41-NEXT: palignr {{.*#+}} xmm0 = xmm1[8,9,10,11,12,13,14,15],xmm0[0,1,2,3,4,5,6,7]
; SSE41-NEXT: retq
;
; AVX-LABEL: shuffle_v2i64_30:
; AVX: # BB#0:
; AVX-NEXT: vpalignr {{.*#+}} xmm0 = xmm1[8,9,10,11,12,13,14,15],xmm0[0,1,2,3,4,5,6,7]
; AVX-NEXT: retq
%shuffle = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 3, i32 0> %shuffle = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 3, i32 0>
ret <2 x i64> %shuffle ret <2 x i64> %shuffle
} }
define <2 x i64> @shuffle_v2i64_30_copy(<2 x i64> %nonce, <2 x i64> %a, <2 x i64> %b) { define <2 x i64> @shuffle_v2i64_30_copy(<2 x i64> %nonce, <2 x i64> %a, <2 x i64> %b) {
; SSE2-LABEL: @shuffle_v2i64_30_copy ; SSE2-LABEL: shuffle_v2i64_30_copy:
; SSE2: shufpd {{.*}} # xmm2 = xmm2[1],xmm1[0] ; SSE2: # BB#0:
; SSE2-NEXT: shufpd {{.*#+}} xmm2 = xmm2[1],xmm1[0]
; SSE2-NEXT: movapd %xmm2, %xmm0 ; SSE2-NEXT: movapd %xmm2, %xmm0
; SSE2-NEXT: retq ; SSE2-NEXT: retq
; ;
; SSE3-LABEL: @shuffle_v2i64_30_copy ; SSE3-LABEL: shuffle_v2i64_30_copy:
; SSE3: shufpd {{.*}} # xmm2 = xmm2[1],xmm1[0] ; SSE3: # BB#0:
; SSE3-NEXT: shufpd {{.*#+}} xmm2 = xmm2[1],xmm1[0]
; SSE3-NEXT: movapd %xmm2, %xmm0 ; SSE3-NEXT: movapd %xmm2, %xmm0
; SSE3-NEXT: retq ; SSE3-NEXT: retq
; ;
; SSSE3-LABEL: @shuffle_v2i64_30_copy ; SSSE3-LABEL: shuffle_v2i64_30_copy:
; SSSE3: palignr {{.*}} # xmm1 = xmm2[8,9,10,11,12,13,14,15],xmm1[0,1,2,3,4,5,6,7] ; SSSE3: # BB#0:
; SSSE3-NEXT: palignr {{.*#+}} xmm1 = xmm2[8,9,10,11,12,13,14,15],xmm1[0,1,2,3,4,5,6,7]
; SSSE3-NEXT: movdqa %xmm1, %xmm0 ; SSSE3-NEXT: movdqa %xmm1, %xmm0
; SSSE3-NEXT: retq ; SSSE3-NEXT: retq
; ;
; SSE41-LABEL: @shuffle_v2i64_30_copy ; SSE41-LABEL: shuffle_v2i64_30_copy:
; SSE41: palignr {{.*}} # xmm1 = xmm2[8,9,10,11,12,13,14,15],xmm1[0,1,2,3,4,5,6,7] ; SSE41: # BB#0:
; SSE41-NEXT: palignr {{.*#+}} xmm1 = xmm2[8,9,10,11,12,13,14,15],xmm1[0,1,2,3,4,5,6,7]
; SSE41-NEXT: movdqa %xmm1, %xmm0 ; SSE41-NEXT: movdqa %xmm1, %xmm0
; SSE41-NEXT: retq ; SSE41-NEXT: retq
;
; AVX-LABEL: shuffle_v2i64_30_copy:
; AVX: # BB#0:
; AVX-NEXT: vpalignr {{.*#+}} xmm0 = xmm2[8,9,10,11,12,13,14,15],xmm1[0,1,2,3,4,5,6,7]
; AVX-NEXT: retq
%shuffle = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 3, i32 0> %shuffle = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 3, i32 0>
ret <2 x i64> %shuffle ret <2 x i64> %shuffle
} }
define <2 x i64> @shuffle_v2i64_31(<2 x i64> %a, <2 x i64> %b) { define <2 x i64> @shuffle_v2i64_31(<2 x i64> %a, <2 x i64> %b) {
; SSE-LABEL: @shuffle_v2i64_31 ; SSE-LABEL: shuffle_v2i64_31:
; SSE: punpckhqdq {{.*}} # xmm1 = xmm1[1],xmm0[1] ; SSE: # BB#0:
; SSE-NEXT: punpckhqdq {{.*#+}} xmm1 = xmm1[1],xmm0[1]
; SSE-NEXT: movdqa %xmm1, %xmm0 ; SSE-NEXT: movdqa %xmm1, %xmm0
; SSE-NEXT: retq ; SSE-NEXT: retq
; ;
; AVX-LABEL: @shuffle_v2i64_31 ; AVX-LABEL: shuffle_v2i64_31:
; AVX: vpunpckhqdq {{.*}} # xmm0 = xmm1[1],xmm0[1] ; AVX: # BB#0:
; AVX-NEXT: vpunpckhqdq {{.*#+}} xmm0 = xmm1[1],xmm0[1]
; AVX-NEXT: retq ; AVX-NEXT: retq
%shuffle = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 3, i32 1> %shuffle = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 3, i32 1>
ret <2 x i64> %shuffle ret <2 x i64> %shuffle
} }
define <2 x i64> @shuffle_v2i64_31_copy(<2 x i64> %nonce, <2 x i64> %a, <2 x i64> %b) { define <2 x i64> @shuffle_v2i64_31_copy(<2 x i64> %nonce, <2 x i64> %a, <2 x i64> %b) {
; SSE-LABEL: @shuffle_v2i64_31_copy ; SSE-LABEL: shuffle_v2i64_31_copy:
; SSE: punpckhqdq {{.*}} # xmm2 = xmm2[1],xmm1[1] ; SSE: # BB#0:
; SSE-NEXT: punpckhqdq {{.*#+}} xmm2 = xmm2[1],xmm1[1]
; SSE-NEXT: movdqa %xmm2, %xmm0 ; SSE-NEXT: movdqa %xmm2, %xmm0
; SSE-NEXT: retq ; SSE-NEXT: retq
; ;
; AVX-LABEL: @shuffle_v2i64_31_copy ; AVX-LABEL: shuffle_v2i64_31_copy:
; AVX: vpunpckhqdq {{.*}} # xmm0 = xmm2[1],xmm1[1] ; AVX: # BB#0:
; AVX-NEXT: vpunpckhqdq {{.*#+}} xmm0 = xmm2[1],xmm1[1]
; AVX-NEXT: retq ; AVX-NEXT: retq
%shuffle = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 3, i32 1> %shuffle = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 3, i32 1>
ret <2 x i64> %shuffle ret <2 x i64> %shuffle
@ -438,12 +622,14 @@ define <2 x i64> @shuffle_v2i64_31_copy(<2 x i64> %nonce, <2 x i64> %a, <2 x i64
define <2 x i64> @insert_reg_and_zero_v2i64(i64 %a) { define <2 x i64> @insert_reg_and_zero_v2i64(i64 %a) {
; SSE-LABEL: @insert_reg_and_zero_v2i64 ; SSE-LABEL: insert_reg_and_zero_v2i64:
; SSE: movd %rdi, %xmm0 ; SSE: # BB#0:
; SSE-NEXT: movd %rdi, %xmm0
; SSE-NEXT: retq ; SSE-NEXT: retq
; ;
; AVX-LABEL: @insert_reg_and_zero_v2i64 ; AVX-LABEL: insert_reg_and_zero_v2i64:
; AVX: vmovq %rdi, %xmm0 ; AVX: # BB#0:
; AVX-NEXT: vmovq %rdi, %xmm0
; AVX-NEXT: retq ; AVX-NEXT: retq
%v = insertelement <2 x i64> undef, i64 %a, i32 0 %v = insertelement <2 x i64> undef, i64 %a, i32 0
%shuffle = shufflevector <2 x i64> %v, <2 x i64> zeroinitializer, <2 x i32> <i32 0, i32 3> %shuffle = shufflevector <2 x i64> %v, <2 x i64> zeroinitializer, <2 x i32> <i32 0, i32 3>
@ -451,9 +637,15 @@ define <2 x i64> @insert_reg_and_zero_v2i64(i64 %a) {
} }
define <2 x i64> @insert_mem_and_zero_v2i64(i64* %ptr) { define <2 x i64> @insert_mem_and_zero_v2i64(i64* %ptr) {
; ALL-LABEL: @insert_mem_and_zero_v2i64 ; SSE-LABEL: insert_mem_and_zero_v2i64:
; ALL: movq (%rdi), %xmm0 ; SSE: # BB#0:
; ALL-NEXT: retq ; SSE-NEXT: movq (%rdi), %xmm0
; SSE-NEXT: retq
;
; AVX-LABEL: insert_mem_and_zero_v2i64:
; AVX: # BB#0:
; AVX-NEXT: vmovq (%rdi), %xmm0
; AVX-NEXT: retq
%a = load i64* %ptr %a = load i64* %ptr
%v = insertelement <2 x i64> undef, i64 %a, i32 0 %v = insertelement <2 x i64> undef, i64 %a, i32 0
%shuffle = shufflevector <2 x i64> %v, <2 x i64> zeroinitializer, <2 x i32> <i32 0, i32 3> %shuffle = shufflevector <2 x i64> %v, <2 x i64> zeroinitializer, <2 x i32> <i32 0, i32 3>
@ -461,18 +653,30 @@ define <2 x i64> @insert_mem_and_zero_v2i64(i64* %ptr) {
} }
define <2 x double> @insert_reg_and_zero_v2f64(double %a) { define <2 x double> @insert_reg_and_zero_v2f64(double %a) {
; ALL-LABEL: @insert_reg_and_zero_v2f64 ; SSE-LABEL: insert_reg_and_zero_v2f64:
; ALL: movq %xmm0, %xmm0 ; SSE: # BB#0:
; ALL-NEXT: retq ; SSE-NEXT: movq %xmm0, %xmm0
; SSE-NEXT: retq
;
; AVX-LABEL: insert_reg_and_zero_v2f64:
; AVX: # BB#0:
; AVX-NEXT: vmovq %xmm0, %xmm0
; AVX-NEXT: retq
%v = insertelement <2 x double> undef, double %a, i32 0 %v = insertelement <2 x double> undef, double %a, i32 0
%shuffle = shufflevector <2 x double> %v, <2 x double> zeroinitializer, <2 x i32> <i32 0, i32 3> %shuffle = shufflevector <2 x double> %v, <2 x double> zeroinitializer, <2 x i32> <i32 0, i32 3>
ret <2 x double> %shuffle ret <2 x double> %shuffle
} }
define <2 x double> @insert_mem_and_zero_v2f64(double* %ptr) { define <2 x double> @insert_mem_and_zero_v2f64(double* %ptr) {
; ALL-LABEL: @insert_mem_and_zero_v2f64 ; SSE-LABEL: insert_mem_and_zero_v2f64:
; ALL: movsd (%rdi), %xmm0 ; SSE: # BB#0:
; ALL-NEXT: retq ; SSE-NEXT: movsd (%rdi), %xmm0
; SSE-NEXT: retq
;
; AVX-LABEL: insert_mem_and_zero_v2f64:
; AVX: # BB#0:
; AVX-NEXT: vmovsd (%rdi), %xmm0
; AVX-NEXT: retq
%a = load double* %ptr %a = load double* %ptr
%v = insertelement <2 x double> undef, double %a, i32 0 %v = insertelement <2 x double> undef, double %a, i32 0
%shuffle = shufflevector <2 x double> %v, <2 x double> zeroinitializer, <2 x i32> <i32 0, i32 3> %shuffle = shufflevector <2 x double> %v, <2 x double> zeroinitializer, <2 x i32> <i32 0, i32 3>
@ -480,45 +684,62 @@ define <2 x double> @insert_mem_and_zero_v2f64(double* %ptr) {
} }
define <2 x double> @insert_dup_reg_v2f64(double %a) { define <2 x double> @insert_dup_reg_v2f64(double %a) {
; SSE2-LABEL: @insert_dup_reg_v2f64 ; FIXME: We should match movddup for SSE3 and higher here.
; SSE2: movlhps {{.*}} # xmm0 = xmm0[0,0] ;
; SSE2-LABEL: insert_dup_reg_v2f64:
; SSE2: # BB#0:
; SSE2-NEXT: movlhps {{.*#+}} xmm0 = xmm0[0,0]
; SSE2-NEXT: retq ; SSE2-NEXT: retq
; ;
; FIXME: This should match movddup as well! ; SSE3-LABEL: insert_dup_reg_v2f64:
; SSE3-LABEL: @insert_dup_reg_v2f64 ; SSE3: # BB#0:
; SSE3: unpcklpd {{.*}} # xmm0 = xmm0[0,0] ; SSE3-NEXT: unpcklpd {{.*#+}} xmm0 = xmm0[0,0]
; SSE3-NEXT: retq ; SSE3-NEXT: retq
; ;
; FIXME: This should match movddup as well! ; SSSE3-LABEL: insert_dup_reg_v2f64:
; SSSE3-LABEL: @insert_dup_reg_v2f64 ; SSSE3: # BB#0:
; SSSE3: unpcklpd {{.*}} # xmm0 = xmm0[0,0] ; SSSE3-NEXT: unpcklpd {{.*#+}} xmm0 = xmm0[0,0]
; SSSE3-NEXT: retq ; SSSE3-NEXT: retq
; ;
; FIXME: This should match movddup as well! ; SSE41-LABEL: insert_dup_reg_v2f64:
; SSE41-LABEL: @insert_dup_reg_v2f64 ; SSE41: # BB#0:
; SSE41: unpcklpd {{.*}} # xmm0 = xmm0[0,0] ; SSE41-NEXT: unpcklpd {{.*#+}} xmm0 = xmm0[0,0]
; SSE41-NEXT: retq ; SSE41-NEXT: retq
;
; AVX-LABEL: insert_dup_reg_v2f64:
; AVX: # BB#0:
; AVX-NEXT: vunpcklpd {{.*#+}} xmm0 = xmm0[0,0]
; AVX-NEXT: retq
%v = insertelement <2 x double> undef, double %a, i32 0 %v = insertelement <2 x double> undef, double %a, i32 0
%shuffle = shufflevector <2 x double> %v, <2 x double> undef, <2 x i32> <i32 0, i32 0> %shuffle = shufflevector <2 x double> %v, <2 x double> undef, <2 x i32> <i32 0, i32 0>
ret <2 x double> %shuffle ret <2 x double> %shuffle
} }
define <2 x double> @insert_dup_mem_v2f64(double* %ptr) { define <2 x double> @insert_dup_mem_v2f64(double* %ptr) {
; SSE2-LABEL: @insert_dup_mem_v2f64 ; SSE2-LABEL: insert_dup_mem_v2f64:
; SSE2: movsd {{.*}}, %xmm0 ; SSE2: # BB#0:
; SSE2-NEXT: movlhps {{.*}} # xmm0 = xmm0[0,0] ; SSE2-NEXT: movsd (%rdi), %xmm0
; SSE2-NEXT: movlhps {{.*#+}} xmm0 = xmm0[0,0]
; SSE2-NEXT: retq ; SSE2-NEXT: retq
; ;
; SSE3-LABEL: @insert_dup_mem_v2f64 ; SSE3-LABEL: insert_dup_mem_v2f64:
; SSE3: movddup {{.*}}, %xmm0 ; SSE3: # BB#0:
; SSE3-NEXT: movddup (%rdi), %xmm0
; SSE3-NEXT: retq ; SSE3-NEXT: retq
; ;
; SSSE3-LABEL: @insert_dup_mem_v2f64 ; SSSE3-LABEL: insert_dup_mem_v2f64:
; SSSE3: movddup {{.*}}, %xmm0 ; SSSE3: # BB#0:
; SSSE3-NEXT: movddup (%rdi), %xmm0
; SSSE3-NEXT: retq ; SSSE3-NEXT: retq
; ;
; SSE41-LABEL: @insert_dup_mem_v2f64 ; SSE41-LABEL: insert_dup_mem_v2f64:
; SSE41: movddup {{.*}}, %xmm0 ; SSE41: # BB#0:
; SSE41-NEXT: movddup (%rdi), %xmm0
; SSE41-NEXT: retq ; SSE41-NEXT: retq
;
; AVX-LABEL: insert_dup_mem_v2f64:
; AVX: # BB#0:
; AVX-NEXT: vmovddup (%rdi), %xmm0
; AVX-NEXT: retq
%a = load double* %ptr %a = load double* %ptr
%v = insertelement <2 x double> undef, double %a, i32 0 %v = insertelement <2 x double> undef, double %a, i32 0
%shuffle = shufflevector <2 x double> %v, <2 x double> undef, <2 x i32> <i32 0, i32 0> %shuffle = shufflevector <2 x double> %v, <2 x double> undef, <2 x i32> <i32 0, i32 0>
@ -526,15 +747,15 @@ define <2 x double> @insert_dup_mem_v2f64(double* %ptr) {
} }
define <2 x double> @shuffle_mem_v2f64_10(<2 x double>* %ptr) { define <2 x double> @shuffle_mem_v2f64_10(<2 x double>* %ptr) {
; SSE-LABEL: @shuffle_mem_v2f64_10 ; SSE-LABEL: shuffle_mem_v2f64_10:
; SSE: # BB#0: ; SSE: # BB#0:
; SSE-NEXT: movapd (%rdi), %xmm0 ; SSE-NEXT: movapd (%rdi), %xmm0
; SSE-NEXT: shufpd {{.*}} # xmm0 = xmm0[1,0] ; SSE-NEXT: shufpd {{.*#+}} xmm0 = xmm0[1,0]
; SSE-NEXT: retq ; SSE-NEXT: retq
; ;
; AVX-LABEL: @shuffle_mem_v2f64_10 ; AVX-LABEL: shuffle_mem_v2f64_10:
; AVX: # BB#0: ; AVX: # BB#0:
; AVX-NEXT: vpermilpd {{.*}} # xmm0 = mem[1,0] ; AVX-NEXT: vpermilpd {{.*#+}} xmm0 = mem[1,0]
; AVX-NEXT: retq ; AVX-NEXT: retq
%a = load <2 x double>* %ptr %a = load <2 x double>* %ptr
%shuffle = shufflevector <2 x double> %a, <2 x double> undef, <2 x i32> <i32 1, i32 0> %shuffle = shufflevector <2 x double> %a, <2 x double> undef, <2 x i32> <i32 1, i32 0>

914
test/CodeGen/X86/vector-shuffle-128-v4.ll
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1239
test/CodeGen/X86/vector-shuffle-128-v8.ll
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