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Add missing builtins to the PPC back end for ABI compliance (vol. 2)

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This patch corresponds to review:
http://reviews.llvm.org/D10874

Back end portion of the second round of additions to altivec.h.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241398 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Nemanja Ivanovic 2015-07-05 06:03:51 +00:00
parent 8720b26a58
commit 8be316bf23
3 changed files with 43 additions and 0 deletions
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6
include/llvm/IR/IntrinsicsPowerPC.td
View File

@ -694,6 +694,12 @@ def int_ppc_vsx_xvrspip :
def int_ppc_vsx_xvrdpip :
Intrinsic<[llvm_v2f64_ty], [llvm_v2f64_ty], [IntrNoMem]>;
// Vector rsqrte
def int_ppc_vsx_xvrsqrtesp : GCCBuiltin<"__builtin_vsx_xvrsqrtesp">,
Intrinsic<[llvm_v4f32_ty], [llvm_v4f32_ty], [IntrNoMem]>;
def int_ppc_vsx_xvrsqrtedp : GCCBuiltin<"__builtin_vsx_xvrsqrtedp">,
Intrinsic<[llvm_v2f64_ty], [llvm_v2f64_ty], [IntrNoMem]>;
// Vector compare
def int_ppc_vsx_xvcmpeqdp :
PowerPC_VSX_Intrinsic<"xvcmpeqdp", [llvm_v2i64_ty],

6
lib/Target/PowerPC/PPCInstrVSX.td
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@ -989,6 +989,12 @@ def : Pat<(int_ppc_vsx_xvdivsp v4f32:$A, v4f32:$B),
def : Pat<(int_ppc_vsx_xvdivdp v2f64:$A, v2f64:$B),
(XVDIVDP $A, $B)>;
// Recip. square root estimate
def : Pat<(int_ppc_vsx_xvrsqrtesp v4f32:$A),
(XVRSQRTESP $A)>;
def : Pat<(int_ppc_vsx_xvrsqrtedp v2f64:$A),
(XVRSQRTEDP $A)>;
} // AddedComplexity
} // HasVSX

31
test/CodeGen/PowerPC/vsx-elementary-arith.ll
View File

@ -116,5 +116,36 @@ entry:
; CHECK: xssqrtdp {{[0-9]+}}
}
; Vector forms
; Function Attrs: nounwind
define <4 x float> @emit_xvrsqrtesp() {
entry:
; CHECK-LABEL: @emit_xvrsqrtesp
%vf = alloca <4 x float>, align 16
%vfr = alloca <4 x float>, align 16
%0 = load <4 x float>, <4 x float>* %vf, align 16
%call = call <4 x float> @llvm.ppc.vsx.xvrsqrtesp(<4 x float> %0)
; CHECK: xvrsqrtesp {{[0-9]+}}, {{[0-9]+}}
ret <4 x float> %call
}
; Function Attrs: nounwind
define <2 x double> @emit_xvrsqrtedp() {
entry:
; CHECK-LABEL: @emit_xvrsqrtedp
%vd = alloca <2 x double>, align 16
%vdr = alloca <2 x double>, align 16
%0 = load <2 x double>, <2 x double>* %vd, align 16
%call = call <2 x double> @llvm.ppc.vsx.xvrsqrtedp(<2 x double> %0)
ret <2 x double> %call
; CHECK: xvrsqrtedp {{[0-9]+}}, {{[0-9]+}}
}
; Function Attrs: nounwind
declare double @sqrt(double)
; Function Attrs: nounwind readnone
declare <4 x float> @llvm.ppc.vsx.xvrsqrtesp(<4 x float>)
; Function Attrs: nounwind readnone
declare <2 x double> @llvm.ppc.vsx.xvrsqrtedp(<2 x double>)