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Add LoadCombine pass.
This pass is disabled by default. Use -combine-loads to enable in -O[1-3] Differential revision: http://reviews.llvm.org/D3580 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209791 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -1464,6 +1464,30 @@ public:
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Value *Zeros = ConstantAggregateZero::get(VectorType::get(I32Ty, NumElts));
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Value *Zeros = ConstantAggregateZero::get(VectorType::get(I32Ty, NumElts));
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return CreateShuffleVector(V, Undef, Zeros, Name + ".splat");
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return CreateShuffleVector(V, Undef, Zeros, Name + ".splat");
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}
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}
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/// \brief Return a value that has been extracted from a larger integer type.
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Value *CreateExtractInteger(const DataLayout &DL, Value *From,
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IntegerType *ExtractedTy, uint64_t Offset,
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const Twine &Name) {
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IntegerType *IntTy = cast<IntegerType>(From->getType());
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assert(DL.getTypeStoreSize(ExtractedTy) + Offset <=
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DL.getTypeStoreSize(IntTy) &&
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"Element extends past full value");
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uint64_t ShAmt = 8 * Offset;
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Value *V = From;
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if (DL.isBigEndian())
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ShAmt = 8 * (DL.getTypeStoreSize(IntTy) -
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DL.getTypeStoreSize(ExtractedTy) - Offset);
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if (ShAmt) {
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V = CreateLShr(V, ShAmt, Name + ".shift");
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}
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assert(ExtractedTy->getBitWidth() <= IntTy->getBitWidth() &&
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"Cannot extract to a larger integer!");
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if (ExtractedTy != IntTy) {
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V = CreateTrunc(V, ExtractedTy, Name + ".trunc");
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}
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return V;
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}
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};
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};
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// Create wrappers for C Binding types (see CBindingWrapping.h).
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// Create wrappers for C Binding types (see CBindingWrapping.h).
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@ -272,6 +272,7 @@ void initializeSLPVectorizerPass(PassRegistry&);
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void initializeBBVectorizePass(PassRegistry&);
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void initializeBBVectorizePass(PassRegistry&);
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void initializeMachineFunctionPrinterPassPass(PassRegistry&);
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void initializeMachineFunctionPrinterPassPass(PassRegistry&);
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void initializeStackMapLivenessPass(PassRegistry&);
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void initializeStackMapLivenessPass(PassRegistry&);
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void initializeLoadCombinePass(PassRegistry&);
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}
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}
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#endif
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#endif
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@ -19,6 +19,7 @@
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namespace llvm {
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namespace llvm {
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class BasicBlockPass;
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class FunctionPass;
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class FunctionPass;
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class Pass;
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class Pass;
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class GetElementPtrInst;
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class GetElementPtrInst;
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@ -381,6 +382,12 @@ FunctionPass *createAddDiscriminatorsPass();
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//
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//
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FunctionPass *createSeparateConstOffsetFromGEPPass();
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FunctionPass *createSeparateConstOffsetFromGEPPass();
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//===----------------------------------------------------------------------===//
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//
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// LoadCombine - Combine loads into bigger loads.
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//
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BasicBlockPass *createLoadCombinePass();
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} // End llvm namespace
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} // End llvm namespace
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#endif
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#endif
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@ -53,6 +53,10 @@ static cl::opt<bool>
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RunLoopRerolling("reroll-loops", cl::Hidden,
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RunLoopRerolling("reroll-loops", cl::Hidden,
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cl::desc("Run the loop rerolling pass"));
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cl::desc("Run the loop rerolling pass"));
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static cl::opt<bool> RunLoadCombine("combine-loads", cl::init(false),
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cl::Hidden,
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cl::desc("Run the load combining pass"));
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PassManagerBuilder::PassManagerBuilder() {
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PassManagerBuilder::PassManagerBuilder() {
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OptLevel = 2;
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OptLevel = 2;
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SizeLevel = 0;
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SizeLevel = 0;
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@ -65,6 +69,7 @@ PassManagerBuilder::PassManagerBuilder() {
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SLPVectorize = RunSLPVectorization;
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SLPVectorize = RunSLPVectorization;
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LoopVectorize = RunLoopVectorization;
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LoopVectorize = RunLoopVectorization;
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RerollLoops = RunLoopRerolling;
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RerollLoops = RunLoopRerolling;
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LoadCombine = RunLoadCombine;
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}
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}
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PassManagerBuilder::~PassManagerBuilder() {
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PassManagerBuilder::~PassManagerBuilder() {
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@ -236,6 +241,9 @@ void PassManagerBuilder::populateModulePassManager(PassManagerBase &MPM) {
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MPM.add(createLoopUnrollPass());
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MPM.add(createLoopUnrollPass());
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}
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}
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if (LoadCombine)
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MPM.add(createLoadCombinePass());
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MPM.add(createAggressiveDCEPass()); // Delete dead instructions
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MPM.add(createAggressiveDCEPass()); // Delete dead instructions
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MPM.add(createCFGSimplificationPass()); // Merge & remove BBs
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MPM.add(createCFGSimplificationPass()); // Merge & remove BBs
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MPM.add(createInstructionCombiningPass()); // Clean up after everything.
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MPM.add(createInstructionCombiningPass()); // Clean up after everything.
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@ -352,6 +360,9 @@ void PassManagerBuilder::populateLTOPassManager(PassManagerBase &PM,
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// More scalar chains could be vectorized due to more alias information
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// More scalar chains could be vectorized due to more alias information
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PM.add(createSLPVectorizerPass()); // Vectorize parallel scalar chains.
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PM.add(createSLPVectorizerPass()); // Vectorize parallel scalar chains.
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if (LoadCombine)
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PM.add(createLoadCombinePass());
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// Cleanup and simplify the code after the scalar optimizations.
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// Cleanup and simplify the code after the scalar optimizations.
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PM.add(createInstructionCombiningPass());
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PM.add(createInstructionCombiningPass());
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addExtensionsToPM(EP_Peephole, PM);
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addExtensionsToPM(EP_Peephole, PM);
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@ -12,6 +12,7 @@ add_llvm_library(LLVMScalarOpts
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IndVarSimplify.cpp
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IndVarSimplify.cpp
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JumpThreading.cpp
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JumpThreading.cpp
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LICM.cpp
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LICM.cpp
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LoadCombine.cpp
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LoopDeletion.cpp
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LoopDeletion.cpp
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LoopIdiomRecognize.cpp
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LoopIdiomRecognize.cpp
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LoopInstSimplify.cpp
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LoopInstSimplify.cpp
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268
lib/Transforms/Scalar/LoadCombine.cpp
Normal file
268
lib/Transforms/Scalar/LoadCombine.cpp
Normal file
@ -0,0 +1,268 @@
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//===- LoadCombine.cpp - Combine Adjacent Loads ---------------------------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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/// \file
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/// This transformation combines adjacent loads.
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///
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//===----------------------------------------------------------------------===//
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#include "llvm/Transforms/Scalar.h"
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#include "llvm/ADT/DenseMap.h"
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#include "llvm/ADT/Statistic.h"
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#include "llvm/Analysis/TargetFolder.h"
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#include "llvm/Pass.h"
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#include "llvm/IR/DataLayout.h"
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#include "llvm/IR/Function.h"
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#include "llvm/IR/Instructions.h"
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#include "llvm/IR/IRBuilder.h"
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#include "llvm/Support/Debug.h"
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#include "llvm/Support/MathExtras.h"
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#include "llvm/Support/raw_ostream.h"
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using namespace llvm;
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#define DEBUG_TYPE "load-combine"
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STATISTIC(NumLoadsAnalyzed, "Number of loads analyzed for combining");
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STATISTIC(NumLoadsCombined, "Number of loads combined");
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namespace {
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struct PointerOffsetPair {
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Value *Pointer;
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uint64_t Offset;
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};
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struct LoadPOPPair {
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LoadPOPPair(LoadInst *L, PointerOffsetPair P, unsigned O)
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: Load(L), POP(P), InsertOrder(O) {}
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LoadPOPPair() {}
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LoadInst *Load;
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PointerOffsetPair POP;
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/// \brief The new load needs to be created before the first load in IR order.
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unsigned InsertOrder;
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};
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class LoadCombine : public BasicBlockPass {
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LLVMContext *C;
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const DataLayout *DL;
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public:
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LoadCombine()
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: BasicBlockPass(ID),
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C(nullptr), DL(nullptr) {
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initializeSROAPass(*PassRegistry::getPassRegistry());
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}
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bool doInitialization(Function &) override;
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bool runOnBasicBlock(BasicBlock &BB) override;
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void getAnalysisUsage(AnalysisUsage &AU) const override;
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const char *getPassName() const override { return "LoadCombine"; }
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static char ID;
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typedef IRBuilder<true, TargetFolder> BuilderTy;
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private:
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BuilderTy *Builder;
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PointerOffsetPair getPointerOffsetPair(LoadInst &);
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bool combineLoads(DenseMap<const Value *, SmallVector<LoadPOPPair, 8>> &);
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bool aggregateLoads(SmallVectorImpl<LoadPOPPair> &);
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bool combineLoads(SmallVectorImpl<LoadPOPPair> &);
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};
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}
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bool LoadCombine::doInitialization(Function &F) {
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DEBUG(dbgs() << "LoadCombine function: " << F.getName() << "\n");
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C = &F.getContext();
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DataLayoutPass *DLP = getAnalysisIfAvailable<DataLayoutPass>();
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if (!DLP) {
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DEBUG(dbgs() << " Skipping LoadCombine -- no target data!\n");
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return false;
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}
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DL = &DLP->getDataLayout();
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return true;
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}
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PointerOffsetPair LoadCombine::getPointerOffsetPair(LoadInst &LI) {
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PointerOffsetPair POP;
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POP.Pointer = LI.getPointerOperand();
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POP.Offset = 0;
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while (isa<BitCastInst>(POP.Pointer) || isa<GetElementPtrInst>(POP.Pointer)) {
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if (auto *GEP = dyn_cast<GetElementPtrInst>(POP.Pointer)) {
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unsigned BitWidth = DL->getPointerTypeSizeInBits(GEP->getType());
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APInt Offset(BitWidth, 0);
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if (GEP->accumulateConstantOffset(*DL, Offset))
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POP.Offset += Offset.getZExtValue();
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else
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// Can't handle GEPs with variable indices.
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return POP;
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POP.Pointer = GEP->getPointerOperand();
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} else if (auto *BC = dyn_cast<BitCastInst>(POP.Pointer))
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POP.Pointer = BC->getOperand(0);
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}
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return POP;
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}
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bool LoadCombine::combineLoads(
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DenseMap<const Value *, SmallVector<LoadPOPPair, 8>> &LoadMap) {
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bool Combined = false;
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for (auto &Loads : LoadMap) {
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if (Loads.second.size() < 2)
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continue;
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std::sort(Loads.second.begin(), Loads.second.end(),
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[](const LoadPOPPair &A, const LoadPOPPair &B) {
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return A.POP.Offset < B.POP.Offset;
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});
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if (aggregateLoads(Loads.second))
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Combined = true;
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}
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return Combined;
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}
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/// \brief Try to aggregate loads from a sorted list of loads to be combined.
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///
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/// It is guaranteed that no writes occur between any of the loads. All loads
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/// have the same base pointer. There are at least two loads.
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bool LoadCombine::aggregateLoads(SmallVectorImpl<LoadPOPPair> &Loads) {
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assert(Loads.size() >= 2 && "Insufficient loads!");
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LoadInst *BaseLoad = nullptr;
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SmallVector<LoadPOPPair, 8> AggregateLoads;
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bool Combined = false;
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uint64_t PrevOffset = -1ull;
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uint64_t PrevSize = 0;
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for (auto &L : Loads) {
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if (PrevOffset == -1ull) {
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BaseLoad = L.Load;
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PrevOffset = L.POP.Offset;
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PrevSize = DL->getTypeStoreSize(L.Load->getType());
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AggregateLoads.push_back(L);
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continue;
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}
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if (L.Load->getAlignment() > BaseLoad->getAlignment())
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continue;
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if (L.POP.Offset > PrevOffset + PrevSize) {
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// No other load will be combinable
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if (combineLoads(AggregateLoads))
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Combined = true;
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AggregateLoads.clear();
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PrevOffset = -1;
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continue;
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}
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if (L.POP.Offset != PrevOffset + PrevSize)
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// This load is offset less than the size of the last load.
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// FIXME: We may want to handle this case.
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continue;
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PrevOffset = L.POP.Offset;
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PrevSize = DL->getTypeStoreSize(L.Load->getType());
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AggregateLoads.push_back(L);
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}
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if (combineLoads(AggregateLoads))
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Combined = true;
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return Combined;
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}
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/// \brief Given a list of combinable load. Combine the maximum number of them.
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bool LoadCombine::combineLoads(SmallVectorImpl<LoadPOPPair> &Loads) {
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// Remove loads from the end while the size is not a power of 2.
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unsigned TotalSize = 0;
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for (const auto &L : Loads)
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TotalSize += L.Load->getType()->getPrimitiveSizeInBits();
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while (TotalSize != 0 && !isPowerOf2_32(TotalSize))
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TotalSize -= Loads.pop_back_val().Load->getType()->getPrimitiveSizeInBits();
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if (Loads.size() < 2)
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return false;
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DEBUG({
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dbgs() << "***** Combining Loads ******\n";
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for (const auto &L : Loads) {
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dbgs() << L.POP.Offset << ": " << *L.Load << "\n";
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}
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});
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// Find first load. This is where we put the new load.
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LoadPOPPair FirstLP;
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FirstLP.InsertOrder = -1u;
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for (const auto &L : Loads)
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if (L.InsertOrder < FirstLP.InsertOrder)
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FirstLP = L;
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unsigned AddressSpace =
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FirstLP.POP.Pointer->getType()->getPointerAddressSpace();
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Builder->SetInsertPoint(FirstLP.Load);
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Value *Ptr = Builder->CreateConstGEP1_64(
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Builder->CreatePointerCast(Loads[0].POP.Pointer,
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Builder->getInt8PtrTy(AddressSpace)),
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Loads[0].POP.Offset);
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LoadInst *NewLoad = new LoadInst(
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Builder->CreatePointerCast(
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Ptr, PointerType::get(IntegerType::get(Ptr->getContext(), TotalSize),
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Ptr->getType()->getPointerAddressSpace())),
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Twine(Loads[0].Load->getName()) + ".combined", false,
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Loads[0].Load->getAlignment(), FirstLP.Load);
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for (const auto &L : Loads) {
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Builder->SetInsertPoint(L.Load);
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Value *V = Builder->CreateExtractInteger(
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*DL, NewLoad, cast<IntegerType>(L.Load->getType()),
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L.POP.Offset - Loads[0].POP.Offset, "combine.extract");
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L.Load->replaceAllUsesWith(V);
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}
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NumLoadsCombined = NumLoadsCombined + Loads.size();
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return true;
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}
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bool LoadCombine::runOnBasicBlock(BasicBlock &BB) {
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if (skipOptnoneFunction(BB) || !DL)
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return false;
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IRBuilder<true, TargetFolder>
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TheBuilder(BB.getContext(), TargetFolder(DL));
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Builder = &TheBuilder;
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DenseMap<const Value *, SmallVector<LoadPOPPair, 8>> LoadMap;
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bool Combined = false;
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unsigned Index = 0;
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for (auto &I : BB) {
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if (I.mayWriteToMemory() || I.mayThrow()) {
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if (combineLoads(LoadMap))
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Combined = true;
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LoadMap.clear();
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continue;
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}
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||||||
|
LoadInst *LI = dyn_cast<LoadInst>(&I);
|
||||||
|
if (!LI)
|
||||||
|
continue;
|
||||||
|
++NumLoadsAnalyzed;
|
||||||
|
if (!LI->isSimple() || !LI->getType()->isIntegerTy())
|
||||||
|
continue;
|
||||||
|
auto POP = getPointerOffsetPair(*LI);
|
||||||
|
if (!POP.Pointer)
|
||||||
|
continue;
|
||||||
|
LoadMap[POP.Pointer].push_back(LoadPOPPair(LI, POP, Index++));
|
||||||
|
}
|
||||||
|
if (combineLoads(LoadMap))
|
||||||
|
Combined = true;
|
||||||
|
return Combined;
|
||||||
|
}
|
||||||
|
|
||||||
|
void LoadCombine::getAnalysisUsage(AnalysisUsage &AU) const {
|
||||||
|
AU.setPreservesCFG();
|
||||||
|
}
|
||||||
|
|
||||||
|
char LoadCombine::ID = 0;
|
||||||
|
|
||||||
|
BasicBlockPass *llvm::createLoadCombinePass() {
|
||||||
|
return new LoadCombine();
|
||||||
|
}
|
||||||
|
|
||||||
|
INITIALIZE_PASS(LoadCombine, "load-combine", "Combine Adjacent Loads", false,
|
||||||
|
false)
|
@ -65,6 +65,7 @@ void llvm::initializeScalarOpts(PassRegistry &Registry) {
|
|||||||
initializeSinkingPass(Registry);
|
initializeSinkingPass(Registry);
|
||||||
initializeTailCallElimPass(Registry);
|
initializeTailCallElimPass(Registry);
|
||||||
initializeSeparateConstOffsetFromGEPPass(Registry);
|
initializeSeparateConstOffsetFromGEPPass(Registry);
|
||||||
|
initializeLoadCombinePass(Registry);
|
||||||
}
|
}
|
||||||
|
|
||||||
void LLVMInitializeScalarOpts(LLVMPassRegistryRef R) {
|
void LLVMInitializeScalarOpts(LLVMPassRegistryRef R) {
|
||||||
|
190
test/Transforms/LoadCombine/load-combine.ll
Normal file
190
test/Transforms/LoadCombine/load-combine.ll
Normal file
@ -0,0 +1,190 @@
|
|||||||
|
; RUN: opt < %s -load-combine -instcombine -S | FileCheck %s
|
||||||
|
|
||||||
|
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
|
||||||
|
target triple = "x86_64-unknown-linux-gnu"
|
||||||
|
|
||||||
|
; Combine read from char* idiom.
|
||||||
|
define i64 @LoadU64_x64_0(i64* %pData) {
|
||||||
|
%1 = bitcast i64* %pData to i8*
|
||||||
|
%2 = load i8* %1, align 1
|
||||||
|
%3 = zext i8 %2 to i64
|
||||||
|
%4 = shl nuw i64 %3, 56
|
||||||
|
%5 = getelementptr inbounds i8* %1, i64 1
|
||||||
|
%6 = load i8* %5, align 1
|
||||||
|
%7 = zext i8 %6 to i64
|
||||||
|
%8 = shl nuw nsw i64 %7, 48
|
||||||
|
%9 = or i64 %8, %4
|
||||||
|
%10 = getelementptr inbounds i8* %1, i64 2
|
||||||
|
%11 = load i8* %10, align 1
|
||||||
|
%12 = zext i8 %11 to i64
|
||||||
|
%13 = shl nuw nsw i64 %12, 40
|
||||||
|
%14 = or i64 %9, %13
|
||||||
|
%15 = getelementptr inbounds i8* %1, i64 3
|
||||||
|
%16 = load i8* %15, align 1
|
||||||
|
%17 = zext i8 %16 to i64
|
||||||
|
%18 = shl nuw nsw i64 %17, 32
|
||||||
|
%19 = or i64 %14, %18
|
||||||
|
%20 = getelementptr inbounds i8* %1, i64 4
|
||||||
|
%21 = load i8* %20, align 1
|
||||||
|
%22 = zext i8 %21 to i64
|
||||||
|
%23 = shl nuw nsw i64 %22, 24
|
||||||
|
%24 = or i64 %19, %23
|
||||||
|
%25 = getelementptr inbounds i8* %1, i64 5
|
||||||
|
%26 = load i8* %25, align 1
|
||||||
|
%27 = zext i8 %26 to i64
|
||||||
|
%28 = shl nuw nsw i64 %27, 16
|
||||||
|
%29 = or i64 %24, %28
|
||||||
|
%30 = getelementptr inbounds i8* %1, i64 6
|
||||||
|
%31 = load i8* %30, align 1
|
||||||
|
%32 = zext i8 %31 to i64
|
||||||
|
%33 = shl nuw nsw i64 %32, 8
|
||||||
|
%34 = or i64 %29, %33
|
||||||
|
%35 = getelementptr inbounds i8* %1, i64 7
|
||||||
|
%36 = load i8* %35, align 1
|
||||||
|
%37 = zext i8 %36 to i64
|
||||||
|
%38 = or i64 %34, %37
|
||||||
|
ret i64 %38
|
||||||
|
; CHECK-LABEL: @LoadU64_x64_0(
|
||||||
|
; CHECK: load i64* %{{.*}}, align 1
|
||||||
|
; CHECK-NOT: load
|
||||||
|
}
|
||||||
|
|
||||||
|
; Combine simple adjacent loads.
|
||||||
|
define i32 @"2xi16_i32"(i16* %x) {
|
||||||
|
%1 = load i16* %x, align 2
|
||||||
|
%2 = getelementptr inbounds i16* %x, i64 1
|
||||||
|
%3 = load i16* %2, align 2
|
||||||
|
%4 = zext i16 %3 to i32
|
||||||
|
%5 = shl nuw i32 %4, 16
|
||||||
|
%6 = zext i16 %1 to i32
|
||||||
|
%7 = or i32 %5, %6
|
||||||
|
ret i32 %7
|
||||||
|
; CHECK-LABEL: @"2xi16_i32"(
|
||||||
|
; CHECK: load i32* %{{.*}}, align 2
|
||||||
|
; CHECK-NOT: load
|
||||||
|
}
|
||||||
|
|
||||||
|
; Don't combine loads across stores.
|
||||||
|
define i32 @"2xi16_i32_store"(i16* %x, i16* %y) {
|
||||||
|
%1 = load i16* %x, align 2
|
||||||
|
store i16 0, i16* %y, align 2
|
||||||
|
%2 = getelementptr inbounds i16* %x, i64 1
|
||||||
|
%3 = load i16* %2, align 2
|
||||||
|
%4 = zext i16 %3 to i32
|
||||||
|
%5 = shl nuw i32 %4, 16
|
||||||
|
%6 = zext i16 %1 to i32
|
||||||
|
%7 = or i32 %5, %6
|
||||||
|
ret i32 %7
|
||||||
|
; CHECK-LABEL: @"2xi16_i32_store"(
|
||||||
|
; CHECK: load i16* %{{.*}}, align 2
|
||||||
|
; CHECK: store
|
||||||
|
; CHECK: load i16* %{{.*}}, align 2
|
||||||
|
}
|
||||||
|
|
||||||
|
; Don't combine loads with a gap.
|
||||||
|
define i32 @"2xi16_i32_gap"(i16* %x) {
|
||||||
|
%1 = load i16* %x, align 2
|
||||||
|
%2 = getelementptr inbounds i16* %x, i64 2
|
||||||
|
%3 = load i16* %2, align 2
|
||||||
|
%4 = zext i16 %3 to i32
|
||||||
|
%5 = shl nuw i32 %4, 16
|
||||||
|
%6 = zext i16 %1 to i32
|
||||||
|
%7 = or i32 %5, %6
|
||||||
|
ret i32 %7
|
||||||
|
; CHECK-LABEL: @"2xi16_i32_gap"(
|
||||||
|
; CHECK: load i16* %{{.*}}, align 2
|
||||||
|
; CHECK: load i16* %{{.*}}, align 2
|
||||||
|
}
|
||||||
|
|
||||||
|
; Combine out of order loads.
|
||||||
|
define i32 @"2xi16_i32_order"(i16* %x) {
|
||||||
|
%1 = getelementptr inbounds i16* %x, i64 1
|
||||||
|
%2 = load i16* %1, align 2
|
||||||
|
%3 = zext i16 %2 to i32
|
||||||
|
%4 = load i16* %x, align 2
|
||||||
|
%5 = shl nuw i32 %3, 16
|
||||||
|
%6 = zext i16 %4 to i32
|
||||||
|
%7 = or i32 %5, %6
|
||||||
|
ret i32 %7
|
||||||
|
; CHECK-LABEL: @"2xi16_i32_order"(
|
||||||
|
; CHECK: load i32* %{{.*}}, align 2
|
||||||
|
; CHECK-NOT: load
|
||||||
|
}
|
||||||
|
|
||||||
|
; Overlapping loads.
|
||||||
|
define i32 @"2xi16_i32_overlap"(i8* %x) {
|
||||||
|
%1 = bitcast i8* %x to i16*
|
||||||
|
%2 = load i16* %1, align 2
|
||||||
|
%3 = getelementptr inbounds i8* %x, i64 1
|
||||||
|
%4 = bitcast i8* %3 to i16*
|
||||||
|
%5 = load i16* %4, align 2
|
||||||
|
%6 = zext i16 %5 to i32
|
||||||
|
%7 = shl nuw i32 %6, 16
|
||||||
|
%8 = zext i16 %2 to i32
|
||||||
|
%9 = or i32 %7, %8
|
||||||
|
ret i32 %9
|
||||||
|
; CHECK-LABEL: @"2xi16_i32_overlap"(
|
||||||
|
; CHECK: load i16* %{{.*}}, align 2
|
||||||
|
; CHECK: load i16* %{{.*}}, align 2
|
||||||
|
}
|
||||||
|
|
||||||
|
; Combine valid alignments.
|
||||||
|
define i64 @"2xi16_i64_align"(i8* %x) {
|
||||||
|
%1 = bitcast i8* %x to i32*
|
||||||
|
%2 = load i32* %1, align 4
|
||||||
|
%3 = getelementptr inbounds i8* %x, i64 4
|
||||||
|
%4 = bitcast i8* %3 to i16*
|
||||||
|
%5 = load i16* %4, align 2
|
||||||
|
%6 = getelementptr inbounds i8* %x, i64 6
|
||||||
|
%7 = bitcast i8* %6 to i16*
|
||||||
|
%8 = load i16* %7, align 2
|
||||||
|
%9 = zext i16 %8 to i64
|
||||||
|
%10 = shl nuw i64 %9, 48
|
||||||
|
%11 = zext i16 %5 to i64
|
||||||
|
%12 = shl nuw nsw i64 %11, 32
|
||||||
|
%13 = zext i32 %2 to i64
|
||||||
|
%14 = or i64 %12, %13
|
||||||
|
%15 = or i64 %14, %10
|
||||||
|
ret i64 %15
|
||||||
|
; CHECK-LABEL: @"2xi16_i64_align"(
|
||||||
|
; CHECK: load i64* %{{.*}}, align 4
|
||||||
|
}
|
||||||
|
|
||||||
|
; Non power of two.
|
||||||
|
define i64 @"2xi16_i64_npo2"(i8* %x) {
|
||||||
|
%1 = load i8* %x, align 1
|
||||||
|
%2 = zext i8 %1 to i64
|
||||||
|
%3 = getelementptr inbounds i8* %x, i64 1
|
||||||
|
%4 = load i8* %3, align 1
|
||||||
|
%5 = zext i8 %4 to i64
|
||||||
|
%6 = shl nuw nsw i64 %5, 8
|
||||||
|
%7 = or i64 %6, %2
|
||||||
|
%8 = getelementptr inbounds i8* %x, i64 2
|
||||||
|
%9 = load i8* %8, align 1
|
||||||
|
%10 = zext i8 %9 to i64
|
||||||
|
%11 = shl nuw nsw i64 %10, 16
|
||||||
|
%12 = or i64 %11, %7
|
||||||
|
%13 = getelementptr inbounds i8* %x, i64 3
|
||||||
|
%14 = load i8* %13, align 1
|
||||||
|
%15 = zext i8 %14 to i64
|
||||||
|
%16 = shl nuw nsw i64 %15, 24
|
||||||
|
%17 = or i64 %16, %12
|
||||||
|
%18 = getelementptr inbounds i8* %x, i64 4
|
||||||
|
%19 = load i8* %18, align 1
|
||||||
|
%20 = zext i8 %19 to i64
|
||||||
|
%21 = shl nuw nsw i64 %20, 32
|
||||||
|
%22 = or i64 %21, %17
|
||||||
|
%23 = getelementptr inbounds i8* %x, i64 5
|
||||||
|
%24 = load i8* %23, align 1
|
||||||
|
%25 = zext i8 %24 to i64
|
||||||
|
%26 = shl nuw nsw i64 %25, 40
|
||||||
|
%27 = or i64 %26, %22
|
||||||
|
%28 = getelementptr inbounds i8* %x, i64 6
|
||||||
|
%29 = load i8* %28, align 1
|
||||||
|
%30 = zext i8 %29 to i64
|
||||||
|
%31 = shl nuw nsw i64 %30, 48
|
||||||
|
%32 = or i64 %31, %27
|
||||||
|
ret i64 %32
|
||||||
|
; CHECK-LABEL: @"2xi16_i64_npo2"(
|
||||||
|
; CHECK: load i32* %{{.*}}, align 1
|
||||||
|
}
|
Loading…
Reference in New Issue
Block a user