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https://github.com/c64scene-ar/llvm-6502.git
synced 2024-08-19 19:29:31 +00:00
Renamed files:
* PowerPCReg.td => PowerPCRegisterinfo.td * PowerPCInstrs.td => PowerPCInstrInfo.td git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15295 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -16,31 +16,31 @@ $(SourceDepend): PowerPCGenRegisterInfo.h.inc PowerPCGenRegisterNames.inc \
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PowerPCGenInstrInfo.inc
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PowerPCGenRegisterNames.inc:: $(SourceDir)/PowerPC.td \
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$(SourceDir)/PowerPCReg.td \
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$(SourceDir)/PowerPCRegisterInfo.td \
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$(SourceDir)/../Target.td $(TBLGEN)
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@echo "Building PowerPC.td register names with tblgen"
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$(VERB) $(TBLGEN) -I $(BUILD_SRC_DIR) $< -gen-register-enums -o $@
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PowerPCGenRegisterInfo.h.inc:: $(SourceDir)/PowerPC.td \
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$(SourceDir)/PowerPCReg.td \
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$(SourceDir)/PowerPCRegisterInfo.td \
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$(SourceDir)/../Target.td $(TBLGEN)
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@echo "Building PowerPC.td register information header with tblgen"
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$(VERB) $(TBLGEN) -I $(BUILD_SRC_DIR) $< -gen-register-desc-header -o $@
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PowerPCGenRegisterInfo.inc:: $(SourceDir)/PowerPC.td \
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$(SourceDir)/PowerPCReg.td \
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$(SourceDir)/PowerPCRegisterInfo.td \
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$(SourceDir)/../Target.td $(TBLGEN)
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@echo "Building PowerPC.td register information implementation with tblgen"
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$(VERB) $(TBLGEN) -I $(BUILD_SRC_DIR) $< -gen-register-desc -o $@
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PowerPCGenInstrNames.inc:: $(SourceDir)/PowerPC.td \
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$(SourceDir)/PowerPCInstrs.td \
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$(SourceDir)/PowerPCInstrInfo.td \
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$(SourceDir)/../Target.td $(TBLGEN)
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@echo "Building PowerPC.td instruction names with tblgen"
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$(VERB) $(TBLGEN) -I $(BUILD_SRC_DIR) $< -gen-instr-enums -o $@
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PowerPCGenInstrInfo.inc:: $(SourceDir)/PowerPC.td \
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$(SourceDir)/PowerPCInstrs.td \
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$(SourceDir)/PowerPCInstrInfo.td \
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$(SourceDir)/../Target.td $(TBLGEN)
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@echo "Building PowerPC.td instruction information with tblgen"
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$(VERB) $(TBLGEN) -I $(BUILD_SRC_DIR) $< -gen-instr-desc -o $@
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@ -1,4 +1,4 @@
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//===- PowerPCInstrInfo.td - Describe the PowerPC Instruction Set -*- C++ -*-=//
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//===- PowerPCInstrInfo.td - The PowerPC Instruction Set -----*- tablegen -*-=//
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//
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// The LLVM Compiler Infrastructure
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//
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@ -1,4 +1,4 @@
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//===- PowerPCReg.td - Describe the PowerPC Register File -------*- C++ -*-===//
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//===- PowerPCRegisterInfo.td - The PowerPC Register File --*- tablegen -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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@ -18,8 +18,8 @@ include "../Target.td"
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// Register File Description
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//===----------------------------------------------------------------------===//
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include "PowerPCReg.td"
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include "PowerPCInstrs.td"
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include "PowerPCRegisterInfo.td"
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include "PowerPCInstrInfo.td"
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def PowerPCInstrInfo : InstrInfo {
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let PHIInst = PHI;
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