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Add MBB successors and physreg Uses in the same order that

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SDISel typically adds them in. This makes it a little easier
to compare FastISel output with SDISel output.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57266 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Dan Gohman 2008-10-07 22:10:33 +00:00
parent 1e9e8c3bd5
commit 8c3f8b6dea
1 changed files with 4 additions and 7 deletions
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11
lib/Target/X86/X86FastISel.cpp
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@ -784,8 +784,8 @@ bool X86FastISel::X86SelectBranch(Instruction *I) {
default:
return false;
}
MBB->addSuccessor(TrueMBB);
FastEmitBranch(FalseMBB);
MBB->addSuccessor(TrueMBB);
return true;
}
}
@ -797,9 +797,8 @@ bool X86FastISel::X86SelectBranch(Instruction *I) {
BuildMI(MBB, TII.get(X86::TEST8rr)).addReg(OpReg).addReg(OpReg);
BuildMI(MBB, TII.get(X86::JNE)).addMBB(TrueMBB);
MBB->addSuccessor(TrueMBB);
FastEmitBranch(FalseMBB);
MBB->addSuccessor(TrueMBB);
return true;
}
@ -1180,10 +1179,8 @@ bool X86FastISel::X86SelectCall(Instruction *I) {
MIB.addReg(X86::EBX);
// Add implicit physical register uses to the call.
while (!RegArgs.empty()) {
MIB.addReg(RegArgs.back());
RegArgs.pop_back();
}
for (unsigned i = 0, e = RegArgs.size(); i != e; ++i)
MIB.addReg(RegArgs[i]);
// Issue CALLSEQ_END
unsigned AdjStackUp = TM.getRegisterInfo()->getCallFrameDestroyOpcode();