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This has been moved to the target-indep code

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23333 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner
2005-09-13 19:32:18 +00:00
parent 82da52299c
commit 8c4469840e
2 changed files with 0 additions and 44 deletions
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22
lib/Target/Sparc/SparcV8ISelPattern.cpp
View File

@@ -245,34 +245,12 @@ public:
ExprMap.clear(); ExprMap.clear();
} }
virtual void EmitFunctionEntryCode(Function &Fn, MachineFunction &MF);
unsigned SelectExpr(SDOperand N); unsigned SelectExpr(SDOperand N);
void Select(SDOperand N); void Select(SDOperand N);
}; };
} }
void ISel::EmitFunctionEntryCode(Function &Fn, MachineFunction &MF) {
// If this function has live-in values, emit the copies from pregs to vregs at
// the top of the function, before anything else.
MachineBasicBlock *BB = MF.begin();
if (MF.livein_begin() != MF.livein_end()) {
SSARegMap *RegMap = MF.getSSARegMap();
for (MachineFunction::livein_iterator LI = MF.livein_begin(),
E = MF.livein_end(); LI != E; ++LI) {
const TargetRegisterClass *RC = RegMap->getRegClass(LI->second);
if (RC == V8::GPRCRegisterClass) {
BuildMI(BB, V8::ORrr, 2, LI->second).addReg(LI->first).addReg(V8::G0);
} else if (RC == V8::FPRCRegisterClass) {
BuildMI(BB, V8::FMOVSrr, 2, LI->second).addReg(LI->first);
} else {
assert(0 && "Unknown regclass!");
}
}
}
}
//These describe LDAx //These describe LDAx
static const int IMM_LOW = -32768; static const int IMM_LOW = -32768;
static const int IMM_HIGH = 32767; static const int IMM_HIGH = 32767;

22
lib/Target/SparcV8/SparcV8ISelPattern.cpp
View File

@@ -245,34 +245,12 @@ public:
ExprMap.clear(); ExprMap.clear();
} }
virtual void EmitFunctionEntryCode(Function &Fn, MachineFunction &MF);
unsigned SelectExpr(SDOperand N); unsigned SelectExpr(SDOperand N);
void Select(SDOperand N); void Select(SDOperand N);
}; };
} }
void ISel::EmitFunctionEntryCode(Function &Fn, MachineFunction &MF) {
// If this function has live-in values, emit the copies from pregs to vregs at
// the top of the function, before anything else.
MachineBasicBlock *BB = MF.begin();
if (MF.livein_begin() != MF.livein_end()) {
SSARegMap *RegMap = MF.getSSARegMap();
for (MachineFunction::livein_iterator LI = MF.livein_begin(),
E = MF.livein_end(); LI != E; ++LI) {
const TargetRegisterClass *RC = RegMap->getRegClass(LI->second);
if (RC == V8::GPRCRegisterClass) {
BuildMI(BB, V8::ORrr, 2, LI->second).addReg(LI->first).addReg(V8::G0);
} else if (RC == V8::FPRCRegisterClass) {
BuildMI(BB, V8::FMOVSrr, 2, LI->second).addReg(LI->first);
} else {
assert(0 && "Unknown regclass!");
}
}
}
}
//These describe LDAx //These describe LDAx
static const int IMM_LOW = -32768; static const int IMM_LOW = -32768;
static const int IMM_HIGH = 32767; static const int IMM_HIGH = 32767;