6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2024-08-23 17:29:19 +00:00
Code Issues Projects Releases Wiki Activity

Skip tied operand pairs that already have the same register.

Browse Source 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161454 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jakob Stoklund Olesen 2012-08-07 22:47:06 +00:00
parent 74500bdba3
commit 8c5c0733cd
1 changed files with 11 additions and 10 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

21
lib/CodeGen/TwoAddressInstructionPass.cpp
View File

@ -1209,27 +1209,28 @@ collectTiedOperands(MachineInstr *MI, TiedOperandMap &TiedOperands) {
if (!MI->isRegTiedToDefOperand(SrcIdx, &DstIdx))
continue;
AnyOps = true;
MachineOperand &SrcMO = MI->getOperand(SrcIdx);
MachineOperand &DstMO = MI->getOperand(DstIdx);
unsigned SrcReg = SrcMO.getReg();
unsigned DstReg = DstMO.getReg();
// Tied constraint already satisfied?
if (SrcReg == DstReg)
continue;
assert(MI->getOperand(SrcIdx).isReg() &&
MI->getOperand(SrcIdx).getReg() &&
MI->getOperand(SrcIdx).isUse() &&
"two address instruction invalid");
unsigned RegB = MI->getOperand(SrcIdx).getReg();
assert(SrcReg && SrcMO.isUse() && "two address instruction invalid");
// Deal with <undef> uses immediately - simply rewrite the src operand.
if (MI->getOperand(SrcIdx).isUndef()) {
unsigned DstReg = MI->getOperand(DstIdx).getReg();
if (SrcMO.isUndef()) {
// Constrain the DstReg register class if required.
if (TargetRegisterInfo::isVirtualRegister(DstReg))
if (const TargetRegisterClass *RC = TII->getRegClass(MCID, SrcIdx,
TRI, *MF))
MRI->constrainRegClass(DstReg, RC);
MI->getOperand(SrcIdx).setReg(DstReg);
SrcMO.setReg(DstReg);
DEBUG(dbgs() << "\t\trewrite undef:\t" << *MI);
continue;
}
TiedOperands[RegB].push_back(std::make_pair(SrcIdx, DstIdx));
TiedOperands[SrcReg].push_back(std::make_pair(SrcIdx, DstIdx));
}
return AnyOps;
}