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synced 2024-08-23 17:29:19 +00:00
Simplify some more getAliasSet callers.
MCRegAliasIterator can include Reg itself in the list. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157848 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -711,13 +711,10 @@ void RAFast::handleThroughOperands(MachineInstr *MI,
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if (!MO.isReg() || !MO.isDef()) continue;
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unsigned Reg = MO.getReg();
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if (!Reg || !TargetRegisterInfo::isPhysicalRegister(Reg)) continue;
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UsedInInstr.set(Reg);
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if (ThroughRegs.count(PhysRegState[Reg]))
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definePhysReg(MI, Reg, regFree);
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for (const uint16_t *AS = TRI->getAliasSet(Reg); *AS; ++AS) {
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UsedInInstr.set(*AS);
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if (ThroughRegs.count(PhysRegState[*AS]))
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definePhysReg(MI, *AS, regFree);
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for (MCRegAliasIterator AI(Reg, TRI, true); AI.isValid(); ++AI) {
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UsedInInstr.set(*AI);
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if (ThroughRegs.count(PhysRegState[*AI]))
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definePhysReg(MI, *AI, regFree);
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}
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}
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@ -1036,9 +1033,8 @@ void RAFast::AllocateBasicBlock() {
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if (!Reg || !TargetRegisterInfo::isPhysicalRegister(Reg)) continue;
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// Look for physreg defs and tied uses.
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if (!MO.isDef() && !MI->isRegTiedToDefOperand(i)) continue;
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UsedInInstr.set(Reg);
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for (const uint16_t *AS = TRI->getAliasSet(Reg); *AS; ++AS)
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UsedInInstr.set(*AS);
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for (MCRegAliasIterator AI(Reg, TRI, true); AI.isValid(); ++AI)
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UsedInInstr.set(*AI);
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}
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}
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@ -43,10 +43,8 @@ void RegScavenger::setUsed(unsigned Reg) {
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}
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bool RegScavenger::isAliasUsed(unsigned Reg) const {
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if (isUsed(Reg))
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return true;
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for (const uint16_t *R = TRI->getAliasSet(Reg); *R; ++R)
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if (isUsed(*R))
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for (MCRegAliasIterator AI(Reg, TRI, true); AI.isValid(); ++AI)
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if (isUsed(*AI))
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return true;
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return false;
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}
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@ -296,9 +294,8 @@ unsigned RegScavenger::findSurvivorReg(MachineBasicBlock::iterator StartMI,
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isVirtKillInsn = true;
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continue;
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}
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Candidates.reset(MO.getReg());
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for (const uint16_t *R = TRI->getAliasSet(MO.getReg()); *R; R++)
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Candidates.reset(*R);
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for (MCRegAliasIterator AI(MO.getReg(), TRI, true); AI.isValid(); ++AI)
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Candidates.reset(*AI);
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}
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// If we're not in a virtual reg's live range, this is a valid
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// restore point.
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@ -441,19 +441,14 @@ static bool CheckForLiveRegDef(SUnit *SU, unsigned Reg,
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SmallVector<unsigned, 4> &LRegs,
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const TargetRegisterInfo *TRI) {
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bool Added = false;
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if (LiveRegDefs[Reg] && LiveRegDefs[Reg] != SU) {
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if (RegAdded.insert(Reg)) {
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LRegs.push_back(Reg);
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Added = true;
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}
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}
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for (const uint16_t *Alias = TRI->getAliasSet(Reg); *Alias; ++Alias)
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if (LiveRegDefs[*Alias] && LiveRegDefs[*Alias] != SU) {
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if (RegAdded.insert(*Alias)) {
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LRegs.push_back(*Alias);
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for (MCRegAliasIterator AI(Reg, TRI, true); AI.isValid(); ++AI) {
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if (LiveRegDefs[*AI] && LiveRegDefs[*AI] != SU) {
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if (RegAdded.insert(*AI)) {
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LRegs.push_back(*AI);
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Added = true;
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}
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}
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}
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return Added;
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}
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