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Simplify some more getAliasSet callers.

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MCRegAliasIterator can include Reg itself in the list.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157848 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jakob Stoklund Olesen 2012-06-01 22:38:17 +00:00
parent 2090766f6e
commit 8c70ea47fa
3 changed files with 15 additions and 27 deletions
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16
lib/CodeGen/RegAllocFast.cpp
View File

@ -711,13 +711,10 @@ void RAFast::handleThroughOperands(MachineInstr *MI,
if (!MO.isReg() || !MO.isDef()) continue; if (!MO.isReg() || !MO.isDef()) continue;
unsigned Reg = MO.getReg(); unsigned Reg = MO.getReg();
if (!Reg || !TargetRegisterInfo::isPhysicalRegister(Reg)) continue; if (!Reg || !TargetRegisterInfo::isPhysicalRegister(Reg)) continue;
UsedInInstr.set(Reg); for (MCRegAliasIterator AI(Reg, TRI, true); AI.isValid(); ++AI) {
if (ThroughRegs.count(PhysRegState[Reg])) UsedInInstr.set(*AI);
definePhysReg(MI, Reg, regFree); if (ThroughRegs.count(PhysRegState[*AI]))
for (const uint16_t *AS = TRI->getAliasSet(Reg); *AS; ++AS) { definePhysReg(MI, *AI, regFree);
UsedInInstr.set(*AS);
if (ThroughRegs.count(PhysRegState[*AS]))
definePhysReg(MI, *AS, regFree);
} }
} }
@ -1036,9 +1033,8 @@ void RAFast::AllocateBasicBlock() {
if (!Reg || !TargetRegisterInfo::isPhysicalRegister(Reg)) continue; if (!Reg || !TargetRegisterInfo::isPhysicalRegister(Reg)) continue;
// Look for physreg defs and tied uses. // Look for physreg defs and tied uses.
if (!MO.isDef() && !MI->isRegTiedToDefOperand(i)) continue; if (!MO.isDef() && !MI->isRegTiedToDefOperand(i)) continue;
UsedInInstr.set(Reg); for (MCRegAliasIterator AI(Reg, TRI, true); AI.isValid(); ++AI)
for (const uint16_t *AS = TRI->getAliasSet(Reg); *AS; ++AS) UsedInInstr.set(*AI);
UsedInInstr.set(*AS);
} }
} }

11
lib/CodeGen/RegisterScavenging.cpp
View File

@ -43,10 +43,8 @@ void RegScavenger::setUsed(unsigned Reg) {
} }
bool RegScavenger::isAliasUsed(unsigned Reg) const { bool RegScavenger::isAliasUsed(unsigned Reg) const {
if (isUsed(Reg)) for (MCRegAliasIterator AI(Reg, TRI, true); AI.isValid(); ++AI)
return true; if (isUsed(*AI))
for (const uint16_t *R = TRI->getAliasSet(Reg); *R; ++R)
if (isUsed(*R))
return true; return true;
return false; return false;
} }
@ -296,9 +294,8 @@ unsigned RegScavenger::findSurvivorReg(MachineBasicBlock::iterator StartMI,
isVirtKillInsn = true; isVirtKillInsn = true;
continue; continue;
} }
Candidates.reset(MO.getReg()); for (MCRegAliasIterator AI(MO.getReg(), TRI, true); AI.isValid(); ++AI)
for (const uint16_t *R = TRI->getAliasSet(MO.getReg()); *R; R++) Candidates.reset(*AI);
Candidates.reset(*R);
} }
// If we're not in a virtual reg's live range, this is a valid // If we're not in a virtual reg's live range, this is a valid
// restore point. // restore point.

15
lib/CodeGen/SelectionDAG/ScheduleDAGFast.cpp
View File

@ -441,19 +441,14 @@ static bool CheckForLiveRegDef(SUnit *SU, unsigned Reg,
SmallVector<unsigned, 4> &LRegs, SmallVector<unsigned, 4> &LRegs,
const TargetRegisterInfo *TRI) { const TargetRegisterInfo *TRI) {
bool Added = false; bool Added = false;
if (LiveRegDefs[Reg] && LiveRegDefs[Reg] != SU) { for (MCRegAliasIterator AI(Reg, TRI, true); AI.isValid(); ++AI) {
if (RegAdded.insert(Reg)) { if (LiveRegDefs[*AI] && LiveRegDefs[*AI] != SU) {
LRegs.push_back(Reg); if (RegAdded.insert(*AI)) {
Added = true; LRegs.push_back(*AI);
}
}
for (const uint16_t *Alias = TRI->getAliasSet(Reg); *Alias; ++Alias)
if (LiveRegDefs[*Alias] && LiveRegDefs[*Alias] != SU) {
if (RegAdded.insert(*Alias)) {
LRegs.push_back(*Alias);
Added = true; Added = true;
} }
} }
}
return Added; return Added;
} }