mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-10-07 05:55:44 +00:00
remove the MAI argument to MCExpr::print and switch overthing to use << when printing them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93699 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
parent
950558aa23
commit
8cb9a3b13f
@ -51,7 +51,7 @@ public:
|
||||
/// @name Utility Methods
|
||||
/// @{
|
||||
|
||||
void print(raw_ostream &OS, const MCAsmInfo *MAI) const;
|
||||
void print(raw_ostream &OS) const;
|
||||
void dump() const;
|
||||
|
||||
/// @}
|
||||
@ -75,6 +75,11 @@ public:
|
||||
|
||||
static bool classof(const MCExpr *) { return true; }
|
||||
};
|
||||
|
||||
inline raw_ostream &operator<<(raw_ostream &OS, const MCExpr &E) {
|
||||
E.print(OS);
|
||||
return OS;
|
||||
}
|
||||
|
||||
//// MCConstantExpr - Represent a constant integer expression.
|
||||
class MCConstantExpr : public MCExpr {
|
||||
|
@ -194,8 +194,7 @@ void DwarfException::EmitCIE(const Function *PersonalityFn, unsigned Index) {
|
||||
PersonalityRef = CreateLabelDiff(PersonalityRef, "personalityref_addr",
|
||||
Index);
|
||||
|
||||
O << MAI->getData32bitsDirective();
|
||||
PersonalityRef->print(O, MAI);
|
||||
O << MAI->getData32bitsDirective() << *PersonalityRef;
|
||||
Asm->EOL("Personality");
|
||||
|
||||
Asm->EmitInt8(LSDAEncoding);
|
||||
|
@ -118,9 +118,7 @@ void MCAsmStreamer::EmitAssignment(MCSymbol *Symbol, const MCExpr *Value) {
|
||||
assert((Symbol->isUndefined() || Symbol->isAbsolute()) &&
|
||||
"Cannot define a symbol twice!");
|
||||
|
||||
OS << *Symbol << " = ";
|
||||
Value->print(OS, &MAI);
|
||||
OS << '\n';
|
||||
OS << *Symbol << " = " << *Value << '\n';
|
||||
|
||||
// FIXME: Lift context changes into super class.
|
||||
// FIXME: Set associated section.
|
||||
@ -194,9 +192,7 @@ void MCAsmStreamer::EmitValue(const MCExpr *Value, unsigned Size) {
|
||||
case 8: OS << ".quad"; break;
|
||||
}
|
||||
|
||||
OS << ' ';
|
||||
truncateToSize(Value, Size)->print(OS, &MAI);
|
||||
OS << '\n';
|
||||
OS << ' ' << *truncateToSize(Value, Size) << '\n';
|
||||
}
|
||||
|
||||
void MCAsmStreamer::EmitValueToAlignment(unsigned ByteAlignment, int64_t Value,
|
||||
@ -250,9 +246,7 @@ void MCAsmStreamer::EmitValueToAlignment(unsigned ByteAlignment, int64_t Value,
|
||||
void MCAsmStreamer::EmitValueToOffset(const MCExpr *Offset,
|
||||
unsigned char Value) {
|
||||
// FIXME: Verify that Offset is associated with the current section.
|
||||
OS << ".org ";
|
||||
Offset->print(OS, &MAI);
|
||||
OS << ", " << (unsigned) Value << '\n';
|
||||
OS << ".org " << *Offset << ", " << (unsigned) Value << '\n';
|
||||
}
|
||||
|
||||
void MCAsmStreamer::EmitInstruction(const MCInst &Inst) {
|
||||
|
@ -15,7 +15,7 @@
|
||||
#include "llvm/Support/raw_ostream.h"
|
||||
using namespace llvm;
|
||||
|
||||
void MCExpr::print(raw_ostream &OS, const MCAsmInfo *MAI) const {
|
||||
void MCExpr::print(raw_ostream &OS) const {
|
||||
switch (getKind()) {
|
||||
case MCExpr::Constant:
|
||||
OS << cast<MCConstantExpr>(*this).getValue();
|
||||
@ -42,7 +42,7 @@ void MCExpr::print(raw_ostream &OS, const MCAsmInfo *MAI) const {
|
||||
case MCUnaryExpr::Not: OS << '~'; break;
|
||||
case MCUnaryExpr::Plus: OS << '+'; break;
|
||||
}
|
||||
UE.getSubExpr()->print(OS, MAI);
|
||||
OS << *UE.getSubExpr();
|
||||
return;
|
||||
}
|
||||
|
||||
@ -51,11 +51,9 @@ void MCExpr::print(raw_ostream &OS, const MCAsmInfo *MAI) const {
|
||||
|
||||
// Only print parens around the LHS if it is non-trivial.
|
||||
if (isa<MCConstantExpr>(BE.getLHS()) || isa<MCSymbolRefExpr>(BE.getLHS())) {
|
||||
BE.getLHS()->print(OS, MAI);
|
||||
OS << *BE.getLHS();
|
||||
} else {
|
||||
OS << '(';
|
||||
BE.getLHS()->print(OS, MAI);
|
||||
OS << ')';
|
||||
OS << '(' << *BE.getLHS() << ')';
|
||||
}
|
||||
|
||||
switch (BE.getOpcode()) {
|
||||
@ -92,11 +90,9 @@ void MCExpr::print(raw_ostream &OS, const MCAsmInfo *MAI) const {
|
||||
|
||||
// Only print parens around the LHS if it is non-trivial.
|
||||
if (isa<MCConstantExpr>(BE.getRHS()) || isa<MCSymbolRefExpr>(BE.getRHS())) {
|
||||
BE.getRHS()->print(OS, MAI);
|
||||
OS << *BE.getRHS();
|
||||
} else {
|
||||
OS << '(';
|
||||
BE.getRHS()->print(OS, MAI);
|
||||
OS << ')';
|
||||
OS << '(' << *BE.getRHS() << ')';
|
||||
}
|
||||
return;
|
||||
}
|
||||
@ -106,7 +102,7 @@ void MCExpr::print(raw_ostream &OS, const MCAsmInfo *MAI) const {
|
||||
}
|
||||
|
||||
void MCExpr::dump() const {
|
||||
print(dbgs(), 0);
|
||||
print(dbgs());
|
||||
dbgs() << '\n';
|
||||
}
|
||||
|
||||
|
@ -23,9 +23,7 @@ void MCOperand::print(raw_ostream &OS, const MCAsmInfo *MAI) const {
|
||||
else if (isImm())
|
||||
OS << "Imm:" << getImm();
|
||||
else if (isExpr()) {
|
||||
OS << "Expr:(";
|
||||
getExpr()->print(OS, MAI);
|
||||
OS << ")";
|
||||
OS << "Expr:(" << *getExpr() << ")";
|
||||
} else
|
||||
OS << "UNDEFINED";
|
||||
OS << ">";
|
||||
|
@ -62,7 +62,7 @@ void ARMInstPrinter::printOperand(const MCInst *MI, unsigned OpNo,
|
||||
} else {
|
||||
assert((Modifier == 0 || Modifier[0] == 0) && "No modifiers supported");
|
||||
assert(Op.isExpr() && "unknown operand kind in printOperand");
|
||||
Op.getExpr()->print(O, &MAI);
|
||||
O << *Op.getExpr();
|
||||
}
|
||||
}
|
||||
|
||||
|
@ -39,7 +39,7 @@ void MSP430InstPrinter::printPCRelImmOperand(const MCInst *MI, unsigned OpNo) {
|
||||
O << Op.getImm();
|
||||
else {
|
||||
assert(Op.isExpr() && "unknown pcrel immediate operand");
|
||||
Op.getExpr()->print(O, &MAI);
|
||||
O << *Op.getExpr();
|
||||
}
|
||||
}
|
||||
|
||||
@ -53,8 +53,7 @@ void MSP430InstPrinter::printOperand(const MCInst *MI, unsigned OpNo,
|
||||
O << '#' << Op.getImm();
|
||||
} else {
|
||||
assert(Op.isExpr() && "unknown operand kind in printOperand");
|
||||
O << '#';
|
||||
Op.getExpr()->print(O, &MAI);
|
||||
O << '#' << *Op.getExpr();
|
||||
}
|
||||
}
|
||||
|
||||
@ -65,8 +64,7 @@ void MSP430InstPrinter::printSrcMemOperand(const MCInst *MI, unsigned OpNo,
|
||||
|
||||
// Print displacement first
|
||||
if (Disp.isExpr()) {
|
||||
O << '&';
|
||||
Disp.getExpr()->print(O, &MAI);
|
||||
O << '&' << *Disp.getExpr();
|
||||
} else {
|
||||
assert(Disp.isImm() && "Expected immediate in displacement field");
|
||||
if (!Base.getReg())
|
||||
|
@ -55,7 +55,7 @@ void X86ATTInstPrinter::print_pcrel_imm(const MCInst *MI, unsigned OpNo) {
|
||||
O << (int)Op.getImm();
|
||||
else {
|
||||
assert(Op.isExpr() && "unknown pcrel immediate operand");
|
||||
Op.getExpr()->print(O, &MAI);
|
||||
O << *Op.getExpr();
|
||||
}
|
||||
}
|
||||
|
||||
@ -68,8 +68,7 @@ void X86ATTInstPrinter::printOperand(const MCInst *MI, unsigned OpNo) {
|
||||
O << '$' << Op.getImm();
|
||||
} else {
|
||||
assert(Op.isExpr() && "unknown operand kind in printOperand");
|
||||
O << '$';
|
||||
Op.getExpr()->print(O, &MAI);
|
||||
O << '$' << *Op.getExpr();
|
||||
}
|
||||
}
|
||||
|
||||
@ -84,7 +83,7 @@ void X86ATTInstPrinter::printLeaMemReference(const MCInst *MI, unsigned Op) {
|
||||
O << DispVal;
|
||||
} else {
|
||||
assert(DispSpec.isExpr() && "non-immediate displacement for LEA?");
|
||||
DispSpec.getExpr()->print(O, &MAI);
|
||||
O << *DispSpec.getExpr();
|
||||
}
|
||||
|
||||
if (IndexReg.getReg() || BaseReg.getReg()) {
|
||||
|
@ -52,7 +52,7 @@ void X86IntelInstPrinter::print_pcrel_imm(const MCInst *MI, unsigned OpNo) {
|
||||
O << Op.getImm();
|
||||
else {
|
||||
assert(Op.isExpr() && "unknown pcrel immediate operand");
|
||||
Op.getExpr()->print(O, &MAI);
|
||||
O << *Op.getExpr();
|
||||
}
|
||||
}
|
||||
|
||||
@ -72,7 +72,7 @@ void X86IntelInstPrinter::printOperand(const MCInst *MI, unsigned OpNo,
|
||||
O << Op.getImm();
|
||||
} else {
|
||||
assert(Op.isExpr() && "unknown operand kind in printOperand");
|
||||
Op.getExpr()->print(O, &MAI);
|
||||
O << *Op.getExpr();
|
||||
}
|
||||
}
|
||||
|
||||
@ -102,7 +102,7 @@ void X86IntelInstPrinter::printLeaMemReference(const MCInst *MI, unsigned Op) {
|
||||
if (!DispSpec.isImm()) {
|
||||
if (NeedPlus) O << " + ";
|
||||
assert(DispSpec.isExpr() && "non-immediate displacement for LEA?");
|
||||
DispSpec.getExpr()->print(O, &MAI);
|
||||
O << *DispSpec.getExpr();
|
||||
} else {
|
||||
int64_t DispVal = DispSpec.getImm();
|
||||
if (DispVal || (!IndexReg.getReg() && !BaseReg.getReg())) {
|
||||
|
Loading…
Reference in New Issue
Block a user