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vml[as].f32 cause stalls in following advanced SIMD instructions. Avoid using
them for scalar floating point operations for now. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85697 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -2841,13 +2841,16 @@ def VMULfd_sfp : N3VDs<1, 0, 0b00, 0b1101, 1, "vmul.f32", v2f32, v2f32, fmul,1>;
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def : N3VDsPat<fmul, VMULfd_sfp>;
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// Vector Multiply-Accumulate/Subtract used for single-precision FP
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let neverHasSideEffects = 1 in
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def VMLAfd_sfp : N3VDMulOps<0, 0, 0b00, 0b1101, 1, IIC_VMACD, "vmla.f32", v2f32,fmul,fadd>;
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def : N3VDMulOpsPat<fmul, fadd, VMLAfd_sfp>;
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// vml[as].f32 can cause 4-8 cycle stalls in following ASIMD instructions, so
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// we want to avoid them for now. e.g., alternating vmla/vadd instructions.
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let neverHasSideEffects = 1 in
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def VMLSfd_sfp : N3VDMulOps<0, 0, 0b10, 0b1101, 1, IIC_VMACD, "vmls.f32", v2f32,fmul,fsub>;
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def : N3VDMulOpsPat<fmul, fsub, VMLSfd_sfp>;
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//let neverHasSideEffects = 1 in
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//def VMLAfd_sfp : N3VDMulOps<0, 0, 0b00, 0b1101, 1, IIC_VMACD, "vmla.f32", v2f32,fmul,fadd>;
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//def : N3VDMulOpsPat<fmul, fadd, VMLAfd_sfp>;
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//let neverHasSideEffects = 1 in
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//def VMLSfd_sfp : N3VDMulOps<0, 0, 0b10, 0b1101, 1, IIC_VMACD, "vmls.f32", v2f32,fmul,fsub>;
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//def : N3VDMulOpsPat<fmul, fsub, VMLSfd_sfp>;
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// Vector Absolute used for single-precision FP
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let neverHasSideEffects = 1 in
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@ -1,7 +1,7 @@
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; RUN: llc < %s -march=arm -mattr=+vfp2 | grep -E {fmacs\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1
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; RUN: llc < %s -march=arm -mattr=+neon -arm-use-neon-fp=1 | grep -E {vmla.f32\\W*d\[0-9\]+,\\W*d\[0-9\]+,\\W*d\[0-9\]+} | count 1
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; RUN: llc < %s -march=arm -mattr=+neon -arm-use-neon-fp=1 | grep -E {vmul.f32\\W*d\[0-9\]+,\\W*d\[0-9\]+,\\W*d\[0-9\]+} | count 1
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; RUN: llc < %s -march=arm -mattr=+neon -arm-use-neon-fp=0 | grep -E {fmacs\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1
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; RUN: llc < %s -march=arm -mcpu=cortex-a8 | grep -E {vmla.f32\\W*d\[0-9\]+,\\W*d\[0-9\]+,\\W*d\[0-9\]+} | count 1
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; RUN: llc < %s -march=arm -mcpu=cortex-a8 | grep -E {vmul.f32\\W*d\[0-9\]+,\\W*d\[0-9\]+,\\W*d\[0-9\]+} | count 1
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; RUN: llc < %s -march=arm -mcpu=cortex-a9 | grep -E {fmacs\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1
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define float @test(float %acc, float %a, float %b) {
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@ -7,8 +7,10 @@ entry:
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; VFP2: fnmacs
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; NEON: fnmacs
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; NEONFP: vmls
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; NEONFP-NOT: vmls
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; NEONFP-NOT: fcpys
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; NEONFP: vmul.f32
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; NEONFP: vsub.f32
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; NEONFP: fmrs
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%0 = fmul float %a, %b
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@ -1,4 +1,4 @@
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; RUN: llc < %s -mtriple=thumbv7-apple-darwin9 -mcpu=cortex-a8 | grep fcpys | count 5
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; RUN: llc < %s -mtriple=thumbv7-apple-darwin9 -mcpu=cortex-a8 | grep fcpys | count 4
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define arm_apcscc void @fht(float* nocapture %fz, i16 signext %n) nounwind {
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entry:
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