[Sparc] Add support for parsing jmpl instruction and make indirect call and jmp instructions as aliases to jmpl.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198909 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Venkatraman Govindaraju
2014-01-10 01:48:17 +00:00
parent 0f09c9f5ac
commit 8ce28c812b
7 changed files with 83 additions and 22 deletions

View File

@ -22,6 +22,7 @@
using namespace llvm;
#define GET_INSTRUCTION_NAME
#define PRINT_ALIAS_INSTR
#include "SparcGenAsmWriter.inc"
void SparcInstPrinter::printRegName(raw_ostream &OS, unsigned RegNo) const
@ -32,10 +33,34 @@ void SparcInstPrinter::printRegName(raw_ostream &OS, unsigned RegNo) const
void SparcInstPrinter::printInst(const MCInst *MI, raw_ostream &O,
StringRef Annot)
{
printInstruction(MI, O);
if (!printAliasInstr(MI, O) && !printSparcAliasInstr(MI, O))
printInstruction(MI, O);
printAnnotation(O, Annot);
}
bool SparcInstPrinter::printSparcAliasInstr(const MCInst *MI, raw_ostream &O)
{
switch (MI->getOpcode()) {
default: return false;
case SP::JMPLrr:
case SP::JMPLri: {
if (MI->getNumOperands() != 3)
return false;
if (!MI->getOperand(0).isReg())
return false;
switch (MI->getOperand(0).getReg()) {
default: return false;
case SP::G0: // jmp $addr
O << "\tjmp "; printMemOperand(MI, 1, O);
return true;
case SP::O7: // call $addr
O << "\tcall "; printMemOperand(MI, 1, O);
return true;
}
}
}
}
void SparcInstPrinter::printOperand(const MCInst *MI, int opNum,
raw_ostream &O)
{