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Start using tablegen'd instruction enum list

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7542 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner 2003-08-03 21:57:05 +00:00
parent 113455be9d
commit 8d44ba8c5c
1 changed files with 3 additions and 10 deletions
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13
lib/Target/X86/X86.h
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@ -47,15 +47,8 @@ Pass *createEmitX86CodeToMemory();
//
#include "X86GenRegisterNames.inc"
/// X86 namespace - This namespace contains all of the register and opcode enums
/// used by the X86 backend.
///
namespace X86 {
// This defines a large number of symbolic names for X86 instruction opcodes.
enum Opcode {
#define I(ENUM, NAME, BASEOPCODE, FLAGS, TSFLAGS, IMPDEFS, IMPUSES) ENUM,
#include "X86InstrInfo.def"
};
}
// Defines symbolic names for the X86 instructions.
//
#include "X86GenInstrNames.inc"
#endif