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Another 32 to 64 bit sign extension bug.

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The fields in the td definition were switched.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161607 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jack Carter 2012-08-09 19:43:18 +00:00
parent bcc4c1d2d1
commit 8d7e5efcaa
2 changed files with 10 additions and 5 deletions
lib/Target/Mips
Mips64InstrInfo.td
test/MC/Mips
sext_64_32.ll

2
lib/Target/Mips/Mips64InstrInfo.td

@ -220,7 +220,7 @@ def DEXT : ExtBase<3, "dext", CPU64Regs>;
def DINS : InsBase<7, "dins", CPU64Regs>;
let isCodeGenOnly = 1, rs = 0, shamt = 0 in {
def DSLL64_32 : FR<0x3c, 0x00, (outs CPU64Regs:$rd), (ins CPURegs:$rt),
def DSLL64_32 : FR<0x00, 0x3c, (outs CPU64Regs:$rd), (ins CPURegs:$rt),
"dsll\t$rd, $rt, 32", [], IIAlu>;
def SLL64_32 : FR<0x0, 0x00, (outs CPU64Regs:$rd), (ins CPURegs:$rt),
"sll\t$rd, $rt, 0", [], IIAlu>;

13
test/MC/Mips/sext_64_32.ll

@ -4,12 +4,17 @@
; CHECK: sll ${{[0-9]+}}, ${{[0-9]+}}, 0
; ModuleID = '../sext.c'
;target datalayout = "e-p:64:64:64-i1:8:8-i8:8:32-i16:16:32-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-v64:64:64-n32"
;target triple = "mips64el-unknown-linux"
define i64 @foo(i32 %ival) nounwind readnone {
entry:
%conv = sext i32 %ival to i64
ret i64 %conv
}
; CHECK: dsll32 ${{[0-9]+}}, ${{[0-9]+}}, 0
define i64 @foo_2(i32 %ival_2) nounwind readnone {
entry:
%conv_2 = zext i32 %ival_2 to i64
ret i64 %conv_2
}