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Wrap a long line and add some parens to be consistent.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98596 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Bob Wilson 2010-03-16 00:31:15 +00:00
parent 999aee24c7
commit 8d95e0be13
1 changed files with 3 additions and 2 deletions
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5
lib/Target/ARM/ARMLoadStoreOptimizer.cpp
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@ -243,8 +243,9 @@ ARMLoadStoreOpt::MergeOps(MachineBasicBlock &MBB,
BaseKill = true; // New base is always killed right its use. BaseKill = true; // New base is always killed right its use.
} }
bool isDPR = Opcode == ARM::VLDRD || Opcode == ARM::VSTRD; bool isDPR = (Opcode == ARM::VLDRD || Opcode == ARM::VSTRD);
bool isDef = isi32Load(Opcode) || Opcode == ARM::VLDRS || Opcode == ARM::VLDRD; bool isDef = (isi32Load(Opcode) || Opcode == ARM::VLDRS ||
Opcode == ARM::VLDRD);
Opcode = getLoadStoreMultipleOpcode(Opcode); Opcode = getLoadStoreMultipleOpcode(Opcode);
MachineInstrBuilder MIB = (isAM4) MachineInstrBuilder MIB = (isAM4)
? BuildMI(MBB, MBBI, dl, TII->get(Opcode)) ? BuildMI(MBB, MBBI, dl, TII->get(Opcode))