diff --git a/lib/Transforms/Scalar/InstructionCombining.cpp b/lib/Transforms/Scalar/InstructionCombining.cpp index 88421db8267..50d6d99e9b0 100644 --- a/lib/Transforms/Scalar/InstructionCombining.cpp +++ b/lib/Transforms/Scalar/InstructionCombining.cpp @@ -12836,7 +12836,15 @@ bool InstCombiner::DoOneIteration(Function &F, unsigned Iteration) { // See if we can trivially sink this instruction to a successor basic block. if (I->hasOneUse()) { BasicBlock *BB = I->getParent(); - BasicBlock *UserParent = cast(I->use_back())->getParent(); + Instruction *UserInst = cast(I->use_back()); + BasicBlock *UserParent; + + // Get the block the use occurs in. + if (PHINode *PN = dyn_cast(UserInst)) + UserParent = PN->getIncomingBlock(I->use_begin().getUse()); + else + UserParent = UserInst->getParent(); + if (UserParent != BB) { bool UserIsSuccessor = false; // See if the user is one of our successors. @@ -12849,8 +12857,7 @@ bool InstCombiner::DoOneIteration(Function &F, unsigned Iteration) { // If the user is one of our immediate successors, and if that successor // only has us as a predecessors (we'd have to split the critical edge // otherwise), we can keep going. - if (UserIsSuccessor && !isa(I->use_back()) && - next(pred_begin(UserParent)) == pred_end(UserParent)) + if (UserIsSuccessor && UserParent->getSinglePredecessor()) // Okay, the CFG is simple enough, try to sink this instruction. MadeIRChange |= TryToSinkInstruction(I, UserParent); } diff --git a/test/Transforms/InstCombine/sink_instruction.ll b/test/Transforms/InstCombine/sink_instruction.ll index c46d210548f..e521de208f2 100644 --- a/test/Transforms/InstCombine/sink_instruction.ll +++ b/test/Transforms/InstCombine/sink_instruction.ll @@ -3,7 +3,8 @@ ;; This tests that the instructions in the entry blocks are sunk into each ;; arm of the 'if'. -define i32 @foo(i1 %C, i32 %A, i32 %B) { +define i32 @test1(i1 %C, i32 %A, i32 %B) { +; CHECK: @test1 entry: %tmp.2 = sdiv i32 %A, %B ; [#uses=1] %tmp.9 = add i32 %B, %A ; [#uses=1] @@ -18,3 +19,38 @@ endif: ; preds = %entry ret i32 %tmp.2 } + +;; PHI use, sink divide before call. +define i32 @test2(i32 %x) nounwind ssp { +; CHECK: @test2 +; CHECK-NOT: sdiv i32 +entry: + br label %bb + +bb: ; preds = %bb2, %entry + %x_addr.17 = phi i32 [ %x, %entry ], [ %x_addr.0, %bb2 ] ; [#uses=4] + %i.06 = phi i32 [ 0, %entry ], [ %4, %bb2 ] ; [#uses=1] + %0 = add nsw i32 %x_addr.17, 1 ; [#uses=1] + %1 = sdiv i32 %0, %x_addr.17 ; [#uses=1] + %2 = icmp eq i32 %x_addr.17, 0 ; [#uses=1] + br i1 %2, label %bb1, label %bb2 + +bb1: ; preds = %bb +; CHECK: bb1: +; CHECK-NEXT: add nsw i32 %x_addr.17, 1 +; CHECK-NEXT: sdiv i32 +; CHECK-NEXT: tail call i32 @bar() + %3 = tail call i32 @bar() nounwind ; [#uses=0] + br label %bb2 + +bb2: ; preds = %bb, %bb1 + %x_addr.0 = phi i32 [ %1, %bb1 ], [ %x_addr.17, %bb ] ; [#uses=2] + %4 = add nsw i32 %i.06, 1 ; [#uses=2] + %exitcond = icmp eq i32 %4, 1000000 ; [#uses=1] + br i1 %exitcond, label %bb4, label %bb + +bb4: ; preds = %bb2 + ret i32 %x_addr.0 +} + +declare i32 @bar()