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https://github.com/c64scene-ar/llvm-6502.git
synced 2024-08-19 19:29:31 +00:00
Fix some warnings, some of which were spurious, and some of which were real
bugs. Thanks Brian! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11859 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -1293,7 +1293,6 @@ void ISel::visitIntrinsicCall(Intrinsic::ID ID, CallInst &CI) {
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}
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// Turn the byte code into # iterations
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unsigned ByteReg;
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unsigned CountReg;
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unsigned Opcode;
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switch (Align & 3) {
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@ -1302,6 +1301,7 @@ void ISel::visitIntrinsicCall(Intrinsic::ID ID, CallInst &CI) {
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CountReg = getReg(ConstantUInt::get(Type::UIntTy, I->getRawValue()/2));
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} else {
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CountReg = makeAnotherReg(Type::IntTy);
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unsigned ByteReg = getReg(CI.getOperand(3));
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BuildMI(BB, X86::SHRri32, 2, CountReg).addReg(ByteReg).addZImm(1);
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}
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Opcode = X86::REP_MOVSW;
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@ -1311,12 +1311,12 @@ void ISel::visitIntrinsicCall(Intrinsic::ID ID, CallInst &CI) {
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CountReg = getReg(ConstantUInt::get(Type::UIntTy, I->getRawValue()/4));
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} else {
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CountReg = makeAnotherReg(Type::IntTy);
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unsigned ByteReg = getReg(CI.getOperand(3));
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BuildMI(BB, X86::SHRri32, 2, CountReg).addReg(ByteReg).addZImm(2);
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}
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Opcode = X86::REP_MOVSD;
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break;
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case 1: // BYTE aligned
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case 3: // BYTE aligned
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default: // BYTE aligned
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CountReg = getReg(CI.getOperand(3));
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Opcode = X86::REP_MOVSB;
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break;
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@ -1341,7 +1341,6 @@ void ISel::visitIntrinsicCall(Intrinsic::ID ID, CallInst &CI) {
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}
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// Turn the byte code into # iterations
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unsigned ByteReg;
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unsigned CountReg;
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unsigned Opcode;
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if (ConstantInt *ValC = dyn_cast<ConstantInt>(CI.getOperand(2))) {
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@ -1354,6 +1353,7 @@ void ISel::visitIntrinsicCall(Intrinsic::ID ID, CallInst &CI) {
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CountReg =getReg(ConstantUInt::get(Type::UIntTy, I->getRawValue()/2));
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} else {
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CountReg = makeAnotherReg(Type::IntTy);
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unsigned ByteReg = getReg(CI.getOperand(3));
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BuildMI(BB, X86::SHRri32, 2, CountReg).addReg(ByteReg).addZImm(1);
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}
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BuildMI(BB, X86::MOVri16, 1, X86::AX).addZImm((Val << 8) | Val);
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@ -1364,14 +1364,14 @@ void ISel::visitIntrinsicCall(Intrinsic::ID ID, CallInst &CI) {
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CountReg =getReg(ConstantUInt::get(Type::UIntTy, I->getRawValue()/4));
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} else {
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CountReg = makeAnotherReg(Type::IntTy);
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unsigned ByteReg = getReg(CI.getOperand(3));
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BuildMI(BB, X86::SHRri32, 2, CountReg).addReg(ByteReg).addZImm(2);
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}
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Val = (Val << 8) | Val;
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BuildMI(BB, X86::MOVri32, 1, X86::EAX).addZImm((Val << 16) | Val);
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Opcode = X86::REP_STOSD;
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break;
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case 1: // BYTE aligned
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case 3: // BYTE aligned
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default: // BYTE aligned
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CountReg = getReg(CI.getOperand(3));
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BuildMI(BB, X86::MOVri8, 1, X86::AL).addZImm(Val);
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Opcode = X86::REP_STOSB;
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@ -1293,7 +1293,6 @@ void ISel::visitIntrinsicCall(Intrinsic::ID ID, CallInst &CI) {
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}
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// Turn the byte code into # iterations
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unsigned ByteReg;
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unsigned CountReg;
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unsigned Opcode;
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switch (Align & 3) {
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@ -1302,6 +1301,7 @@ void ISel::visitIntrinsicCall(Intrinsic::ID ID, CallInst &CI) {
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CountReg = getReg(ConstantUInt::get(Type::UIntTy, I->getRawValue()/2));
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} else {
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CountReg = makeAnotherReg(Type::IntTy);
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unsigned ByteReg = getReg(CI.getOperand(3));
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BuildMI(BB, X86::SHRri32, 2, CountReg).addReg(ByteReg).addZImm(1);
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}
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Opcode = X86::REP_MOVSW;
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@ -1311,12 +1311,12 @@ void ISel::visitIntrinsicCall(Intrinsic::ID ID, CallInst &CI) {
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CountReg = getReg(ConstantUInt::get(Type::UIntTy, I->getRawValue()/4));
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} else {
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CountReg = makeAnotherReg(Type::IntTy);
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unsigned ByteReg = getReg(CI.getOperand(3));
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BuildMI(BB, X86::SHRri32, 2, CountReg).addReg(ByteReg).addZImm(2);
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}
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Opcode = X86::REP_MOVSD;
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break;
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case 1: // BYTE aligned
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case 3: // BYTE aligned
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default: // BYTE aligned
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CountReg = getReg(CI.getOperand(3));
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Opcode = X86::REP_MOVSB;
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break;
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@ -1341,7 +1341,6 @@ void ISel::visitIntrinsicCall(Intrinsic::ID ID, CallInst &CI) {
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}
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// Turn the byte code into # iterations
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unsigned ByteReg;
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unsigned CountReg;
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unsigned Opcode;
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if (ConstantInt *ValC = dyn_cast<ConstantInt>(CI.getOperand(2))) {
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@ -1354,6 +1353,7 @@ void ISel::visitIntrinsicCall(Intrinsic::ID ID, CallInst &CI) {
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CountReg =getReg(ConstantUInt::get(Type::UIntTy, I->getRawValue()/2));
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} else {
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CountReg = makeAnotherReg(Type::IntTy);
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unsigned ByteReg = getReg(CI.getOperand(3));
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BuildMI(BB, X86::SHRri32, 2, CountReg).addReg(ByteReg).addZImm(1);
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}
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BuildMI(BB, X86::MOVri16, 1, X86::AX).addZImm((Val << 8) | Val);
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@ -1364,14 +1364,14 @@ void ISel::visitIntrinsicCall(Intrinsic::ID ID, CallInst &CI) {
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CountReg =getReg(ConstantUInt::get(Type::UIntTy, I->getRawValue()/4));
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} else {
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CountReg = makeAnotherReg(Type::IntTy);
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unsigned ByteReg = getReg(CI.getOperand(3));
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BuildMI(BB, X86::SHRri32, 2, CountReg).addReg(ByteReg).addZImm(2);
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}
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Val = (Val << 8) | Val;
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BuildMI(BB, X86::MOVri32, 1, X86::EAX).addZImm((Val << 16) | Val);
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Opcode = X86::REP_STOSD;
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break;
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case 1: // BYTE aligned
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case 3: // BYTE aligned
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default: // BYTE aligned
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CountReg = getReg(CI.getOperand(3));
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BuildMI(BB, X86::MOVri8, 1, X86::AL).addZImm(Val);
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Opcode = X86::REP_STOSB;
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