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[X86] AVX512: Add vmovntdqa
Along with the corresponding intrinsic and tests. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210543 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -1939,6 +1939,8 @@ let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.".
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llvm_i32_ty], [IntrNoMem, Commutative]>;
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llvm_i32_ty], [IntrNoMem, Commutative]>;
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def int_x86_avx2_movntdqa : GCCBuiltin<"__builtin_ia32_movntdqa256">,
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def int_x86_avx2_movntdqa : GCCBuiltin<"__builtin_ia32_movntdqa256">,
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Intrinsic<[llvm_v4i64_ty], [llvm_ptr_ty], [IntrReadMem]>;
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Intrinsic<[llvm_v4i64_ty], [llvm_ptr_ty], [IntrReadMem]>;
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def int_x86_avx512_movntdqa : GCCBuiltin<"__builtin_ia32_movntdqa512">,
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Intrinsic<[llvm_v8i64_ty], [llvm_ptr_ty], [IntrReadMem]>;
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}
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}
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//===----------------------------------------------------------------------===//
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//===----------------------------------------------------------------------===//
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@ -1787,6 +1787,17 @@ def : Pat<(v16i32 (X86Vinsert undef, GR32:$src2, (iPTR 0))),
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def : Pat<(v8i64 (X86Vinsert undef, GR64:$src2, (iPTR 0))),
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def : Pat<(v8i64 (X86Vinsert undef, GR64:$src2, (iPTR 0))),
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(SUBREG_TO_REG (i32 0), (VMOV64toPQIZrr GR64:$src2), sub_xmm)>;
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(SUBREG_TO_REG (i32 0), (VMOV64toPQIZrr GR64:$src2), sub_xmm)>;
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//===----------------------------------------------------------------------===//
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// AVX-512 - Non-temporals
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//===----------------------------------------------------------------------===//
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def VMOVNTDQAZrm : AVX5128I<0x2A, MRMSrcMem, (outs VR512:$dst),
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(ins i512mem:$src),
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"vmovntdqa\t{$src, $dst|$dst, $src}",
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[(set VR512:$dst,
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(int_x86_avx512_movntdqa addr:$src))]>,
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EVEX, EVEX_V512;
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//===----------------------------------------------------------------------===//
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//===----------------------------------------------------------------------===//
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// AVX-512 - Integer arithmetic
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// AVX-512 - Integer arithmetic
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//
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//
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@ -545,3 +545,12 @@ define <16 x float> @test_vpermt2ps(<16 x float>%x, <16 x float>%y, <16 x i32>%p
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}
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}
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declare <16 x float> @llvm.x86.avx512.mask.vpermt.ps.512(<16 x i32>, <16 x float>, <16 x float>, i16)
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declare <16 x float> @llvm.x86.avx512.mask.vpermt.ps.512(<16 x i32>, <16 x float>, <16 x float>, i16)
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define <8 x i64> @test_vmovntdqa(i8 *%x) {
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; CHECK-LABEL: test_vmovntdqa:
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; CHECK: vmovntdqa (%rdi), %zmm0 ## encoding: [0x62,0xf2,0x7d,0x48,0x2a,0x07]
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%res = call <8 x i64> @llvm.x86.avx512.movntdqa(i8* %x)
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ret <8 x i64> %res
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}
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declare <8 x i64> @llvm.x86.avx512.movntdqa(i8*)
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@ -3151,3 +3151,11 @@ vaddpd 512(%rdi, %rsi, 8) {1to8}, %zmm20, %zmm30
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// CHECK: vaddps {{.*}}{1to16}
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// CHECK: vaddps {{.*}}{1to16}
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// CHECK: encoding: [0x62,0x61,0x5c,0x50,0x58,0xb4,0xf7,0x00,0x02,0x00,0x00]
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// CHECK: encoding: [0x62,0x61,0x5c,0x50,0x58,0xb4,0xf7,0x00,0x02,0x00,0x00]
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vaddps 512(%rdi, %rsi, 8) {1to16}, %zmm20, %zmm30
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vaddps 512(%rdi, %rsi, 8) {1to16}, %zmm20, %zmm30
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// CHECK: vmovntdqa
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// CHECK: encoding: [0x62,0x72,0x7d,0x48,0x2a,0xab,0x78,0x56,0x34,0x12]
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vmovntdqa 0x12345678(%rbx), %zmm13
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// CHECK: vmovntdqa
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// CHECK: encoding: [0x62,0xc2,0x7d,0x48,0x2a,0x14,0x56]
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vmovntdqa (%r14,%rdx,2), %zmm18
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