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Optimize the "bit test" code path for switch lowering in the
case where the bit mask has exactly one bit. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106716 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -1557,29 +1557,41 @@ void SelectionDAGBuilder::visitBitTestCase(MachineBasicBlock* NextMBB,
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unsigned Reg,
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BitTestCase &B,
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MachineBasicBlock *SwitchBB) {
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// Make desired shift
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SDValue ShiftOp = DAG.getCopyFromReg(getControlRoot(), getCurDebugLoc(), Reg,
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TLI.getPointerTy());
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SDValue SwitchVal = DAG.getNode(ISD::SHL, getCurDebugLoc(),
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TLI.getPointerTy(),
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DAG.getConstant(1, TLI.getPointerTy()),
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ShiftOp);
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SDValue Cmp;
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if (CountPopulation_64(B.Mask) == 1) {
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// Testing for a single bit; just compare the shift count with what it
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// would need to be to shift a 1 bit in that position.
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Cmp = DAG.getSetCC(getCurDebugLoc(),
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TLI.getSetCCResultType(ShiftOp.getValueType()),
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ShiftOp,
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DAG.getConstant(CountTrailingZeros_64(B.Mask),
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TLI.getPointerTy()),
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ISD::SETEQ);
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} else {
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// Make desired shift
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SDValue SwitchVal = DAG.getNode(ISD::SHL, getCurDebugLoc(),
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TLI.getPointerTy(),
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DAG.getConstant(1, TLI.getPointerTy()),
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ShiftOp);
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// Emit bit tests and jumps
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SDValue AndOp = DAG.getNode(ISD::AND, getCurDebugLoc(),
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TLI.getPointerTy(), SwitchVal,
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DAG.getConstant(B.Mask, TLI.getPointerTy()));
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SDValue AndCmp = DAG.getSetCC(getCurDebugLoc(),
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TLI.getSetCCResultType(AndOp.getValueType()),
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AndOp, DAG.getConstant(0, TLI.getPointerTy()),
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ISD::SETNE);
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// Emit bit tests and jumps
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SDValue AndOp = DAG.getNode(ISD::AND, getCurDebugLoc(),
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TLI.getPointerTy(), SwitchVal,
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DAG.getConstant(B.Mask, TLI.getPointerTy()));
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Cmp = DAG.getSetCC(getCurDebugLoc(),
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TLI.getSetCCResultType(AndOp.getValueType()),
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AndOp, DAG.getConstant(0, TLI.getPointerTy()),
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ISD::SETNE);
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}
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SwitchBB->addSuccessor(B.TargetBB);
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SwitchBB->addSuccessor(NextMBB);
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SDValue BrAnd = DAG.getNode(ISD::BRCOND, getCurDebugLoc(),
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MVT::Other, getControlRoot(),
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AndCmp, DAG.getBasicBlock(B.TargetBB));
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Cmp, DAG.getBasicBlock(B.TargetBB));
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// Set NextBlock to be the MBB immediately after the current one, if any.
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// This is used to avoid emitting unnecessary branches to the next block.
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51
test/CodeGen/X86/switch-bt.ll
Normal file
51
test/CodeGen/X86/switch-bt.ll
Normal file
@ -0,0 +1,51 @@
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; RUN: llc -march=x86-64 -asm-verbose=false < %s | FileCheck %s
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; This switch should use bit tests, and the third bit test case is just
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; testing for one possible value, so it doesn't need a bt.
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; CHECK: movabsq $2305843009482129440, %r
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; CHECK-NEXT: btq %rax, %r
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; CHECK-NEXT: jb
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; CHECK-NEXT: movl $671088640, %e
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; CHECK-NEXT: btq %rax, %r
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; CHECK-NEXT: jb
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; CHECK-NEXT: testq %rax, %r
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; CHECK-NEXT: j
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define void @test(i8* %l) nounwind {
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entry:
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%l.addr = alloca i8*, align 8 ; <i8**> [#uses=2]
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store i8* %l, i8** %l.addr
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%tmp = load i8** %l.addr ; <i8*> [#uses=1]
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%tmp1 = load i8* %tmp ; <i8> [#uses=1]
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%conv = sext i8 %tmp1 to i32 ; <i32> [#uses=1]
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switch i32 %conv, label %sw.default [
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i32 62, label %sw.bb
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i32 60, label %sw.bb
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i32 38, label %sw.bb2
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i32 94, label %sw.bb2
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i32 61, label %sw.bb2
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i32 33, label %sw.bb4
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]
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sw.bb: ; preds = %entry, %entry
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call void @foo(i32 0)
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br label %sw.epilog
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sw.bb2: ; preds = %entry, %entry, %entry
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call void @foo(i32 1)
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br label %sw.epilog
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sw.bb4: ; preds = %entry
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call void @foo(i32 3)
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br label %sw.epilog
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sw.default: ; preds = %entry
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call void @foo(i32 97)
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br label %sw.epilog
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sw.epilog: ; preds = %sw.default, %sw.bb4, %sw.bb2, %sw.bb
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ret void
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}
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declare void @foo(i32)
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