6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2025-07-23 14:25:07 +00:00
Code Issues Projects Releases Wiki Activity

If call frame is not part of stack frame and no dynamic alloc, eliminateFrameIndex() must adjust SP offset with size of call frames.

Browse Source 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36625 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Evan Cheng
2007-05-01 09:01:42 +00:00
parent a09f0d4ab7
commit 8e33473321
2 changed files with 48 additions and 17 deletions
Download Patch File Download Diff File Expand all files Collapse all files

9
lib/CodeGen/RegisterScavenging.cpp
View File

@@ -75,7 +75,7 @@ void RegScavenger::restoreScavengedReg() {
RegInfo->loadRegFromStackSlot(*MBB, MBBI, ScavengedReg,
ScavengingFrameIndex, ScavengedRC);
MachineBasicBlock::iterator II = prior(MBBI);
RegInfo->eliminateFrameIndex(II, this);
RegInfo->eliminateFrameIndex(II, 0, this);
setUsed(ScavengedReg);
ScavengedReg = 0;
ScavengedRC = NULL;
@@ -243,7 +243,8 @@ static unsigned calcDistanceToUse(MachineBasicBlock *MBB,
}
unsigned RegScavenger::scavengeRegister(const TargetRegisterClass *RC,
MachineBasicBlock::iterator I) {
MachineBasicBlock::iterator I,
int SPAdj) {
assert(ScavengingFrameIndex >= 0 &&
"Cannot scavenge a register without an emergency spill slot!");
@@ -277,12 +278,12 @@ unsigned RegScavenger::scavengeRegister(const TargetRegisterClass *RC,
RegInfo->loadRegFromStackSlot(*MBB, I, ScavengedReg,
ScavengingFrameIndex, ScavengedRC);
MachineBasicBlock::iterator II = prior(I);
RegInfo->eliminateFrameIndex(II, this);
RegInfo->eliminateFrameIndex(II, SPAdj, this);
}
RegInfo->storeRegToStackSlot(*MBB, I, SReg, ScavengingFrameIndex, RC);
MachineBasicBlock::iterator II = prior(I);
RegInfo->eliminateFrameIndex(II, this);
RegInfo->eliminateFrameIndex(II, SPAdj, this);
ScavengedReg = SReg;
ScavengedRC = RC;