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Eliminate special-casing 14-bit immediate load/store opcodes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15677 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -570,8 +570,11 @@ void Printer::printMachineInstruction(const MachineInstr *MI) {
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}
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O << TII.getName(Opcode) << " ";
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if (Opcode == PPC::LD || Opcode == PPC::LWA ||
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Opcode == PPC::STDU || Opcode == PPC::STDUX) {
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if (Opcode == PPC::BLR || Opcode == PPC::NOP) {
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// FIXME: BuildMI() should handle 0 params
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O << "\n";
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} else if (ArgCount == 3 &&
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(ArgType[1] == PPCII::Disimm16 || ArgType[1] == PPCII::Disimm14)) {
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printOp(MI->getOperand(0));
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O << ", ";
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MachineOperand MO = MI->getOperand(1);
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@ -582,20 +585,6 @@ void Printer::printMachineInstruction(const MachineInstr *MI) {
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O << "(";
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printOp(MI->getOperand(2));
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O << ")\n";
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} else if (Opcode == PPC::BLR || Opcode == PPC::NOP) {
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// FIXME: BuildMI() should handle 0 params
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O << "\n";
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} else if (ArgCount == 3 && ArgType[1] == PPCII::Disimm16) {
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printOp(MI->getOperand(0));
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O << ", ";
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printImmOp(MI->getOperand(1), ArgType[1]);
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O << "(";
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if (MI->getOperand(2).hasAllocatedReg() &&
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MI->getOperand(2).getReg() == PPC::R0)
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O << "0";
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else
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printOp(MI->getOperand(2));
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O << ")\n";
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} else {
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for (i = 0; i < ArgCount; ++i) {
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// addi and friends
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